Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device, comprising:

• forming a first layer on a first substrate;
• sequentially forming a second layer and a photoresist (PR) layer on the first layer;
• forming a PR pattern on the second layer by exposing top field areas and bottom field areas of the PR layer in a first exposing apparatus, the top field areas arranged in a first line in parallel with a first direction, the bottom field areas arranged in a second line in parallel with the first direction, the first line and the second line being spaced apart in a second direction perpendicular to the first direction;
• measuring a top intra-field overlay for the top field areas and a bottom intra-field overlay for the bottom field areas;
• determining a top intra-field correction parameter based on the top intra-field overlay and a bottom intra-field correction parameter based on the bottom intra-field overlay;
• feeding back the determined top intra-field correction parameter and the determined bottom intra-field correction parameter to the first exposing apparatus;
• inspecting the PR pattern;
• and
• selectively reworking the PR pattern based on an inspection result, to form the semiconductor device,
• wherein
• each of the top field areas has a first reduction ratio in the first direction and a second reduction ratio in the second direction with respect to a photomask of the first exposing apparatus,
• each of the bottom field areas has a third reduction ratio in the first direction and a fourth reduction ratio in the second direction with respect to the photomask of the first exposing apparatus, and
• the first reduction ratio and the second reduction ratio are different from each other and the third reduction ratio and the fourth reduction ratio are different from each other.

A method of manufacturing a semiconductor device, comprising:

• sequentially forming a first material layer and photoresist (PR) layer on a first substrate;
• forming a first PR pattern by a first exposing process on the first PR layer in a first exposing apparatus, the first exposing process including exposing first field areas of the first PR layer;
• forming a first pattern layer by a first etching process on the first material layer using the first PR pattern as an etching mask;
• sequentially forming a second material layer and a second PR layer on the first pattern layer;
• forming a second PR pattern by a second exposing process on the second PR layer in a second exposing apparatus, the second exposing process including exposing a plurality of first top field areas and a plurality of first bottom field areas of the second PR layer, each of the first top field areas vertically overlapping first portions of corresponding ones of the first field areas, and each of the first bottom field areas vertically overlapping second portions of corresponding ones of the first field areas, respectively;
• forming a second pattern layer by a second etching process on the second material layer using the second PR pattern as an etching mask, the second pattern layer including second top field areas vertically overlapping the first top field areas and second bottom field areas vertically overlapping the first bottom field areas;
• measuring a top intra-field overlay for the second top field areas and a bottom intra-field overlay for the second bottom field areas;
• determining a top intra-field correction parameter based on the top intra-field overlay and a top intra-field correction function;
• determining a bottom intra-field parameter based on the bottom intra-field overlay and a bottom intra-field correction function;
• feeding back the determined top intra-field correction parameter and the determined bottom intra-field correction parameter to the second exposing apparatus;
• inspecting the second PR pattern;
• and
• selectively reworking the second PR pattern based on an inspection result, to form the semiconductor device.