Offset vertical interconnect and compression post for 3D-integrated electrical device

A 3D-integrated electrical device comprising a first electrical device bonded and electrically integrated to a second electrical device, the 3D-integrated electrical device comprising:

• a bonding layer;
• first and second dielectric layers on opposite sides of respective portions of the bonding layer;
• first and second via holes in respective portions of the first and second dielectric layers, the first and second via holes being arranged opposite to each other, wherein the bonding layer is disposed within the first and second via holes to form respective first and second post portions of the 3D-integrated electrical device;
• an electrically conductive vertical interconnect extending through the bonding layer, the vertical interconnect being laterally offset from the first and second post portions;
• a contact pad underlying at least a portion of the first post portion;
• and
• a conductor layer overlying at least a portion of the first dielectric layer to electrically connect the contact pad with a first end portion of the vertical interconnect.

A method of making an electrical device, comprising:

• providing a substrate that includes (i) a lower substrate layer, (ii) a layer of photoconductive material over the lower substrate layer, and (iii) a passivation layer over the layer of photoconductive material, wherein a fragile material forms at least part of the substrate;
• forming a dielectric layer overlying at least a portion of the substrate, the dielectric layer comprising:
• a first dielectric layer portion;
• and
• a second dielectric layer portion at least partially overlying the first dielectric layer portion;
• forming a via hole in the dielectric layer extending through the first dielectric layer portion, the second dielectric layer portion, and the passivation layer;
• forming an implant within the layer of photoconductive material underlying the via hole, the implant oppositely doped to that of the photoconductive material, wherein a region of the electrical device underlying the implant includes the fragile material that forms at least part of the substrate;
• forming a vertical post in the via hole;
• forming an electrical contact pad between the vertical post and the implant;
• forming an electrically conductive vertical interconnect laterally offset from the vertical post;
• and
• forming an electrical connector extending from the electrical contact pad to the vertical interconnect to provide electrical communication therebetween;
• wherein the vertical post is configured to impart a non-tensile state to a region of the electrical device underlying the vertical post.