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US 12,593,520 B2Granted
Image sensor including pixels having a plurality of capacitors
AssigneeSamsung Electronics Co., Ltd.
InventorsJuyeong Kim, Changhyun Park, Eunsub Shim
Life of this patent
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Abstract
An image sensor includes a pixel array in which a plurality of pixels are arranged, wherein each of the pixels includes a photodiode, a transfer transistor, first to third floating diffusion nodes, a first capacitor, a second capacitor, a third capacitor, a first switch transistor, a second switch transistor, and a reset transistor. The second switch transistor is configured to turn off in a first period and to turn on in a second period of an exposure period of the photodiode, and the reset transistor is configured to turn on in the first period and to turn off in the second period of the exposure period of the photodiode.
Claims20
An image sensor including a pixel array in which a plurality of pixels are arranged, wherein
- each of the plurality of pixels comprises:
- a photodiode;
- a transfer transistor connected between the photodiode and a first floating diffusion node;
- a first switch transistor connected between the first floating diffusion node and a second floating diffusion node;
- a second switch transistor connected between the second floating diffusion node and a third floating diffusion node;
- a first capacitor connected to the second floating diffusion node;
- a second capacitor connected to the third floating diffusion node;
- and
- a reset transistor having one end connected to the third floating diffusion node and another end to which a pixel voltage is applied,
- wherein, the reset transistor is configured to turn on in a first period of an exposure period of the photodiode and to turn off in a second period of the exposure period,
- the first switch transistor is configured to turn on in the first period and the second period of the exposure period, and
- the second switch transistor is configured to turn off in the first period of the exposure period and to turn on in the second period of the exposure period.
9 more elements
An image sensor comprising:
- a pixel array in which a plurality of pixels are arranged;
- a row driver configured to provide a select signal to the pixel array;
- and
- a readout circuit configured to read out pixel signals output from pixels of a row line selected by the row driver,
- wherein each of the plurality of pixels comprises:
- a photodiode;
- a transfer transistor connected between the photodiode and a first floating diffusion node;
- a first switch transistor connected between the first floating diffusion node and a second floating diffusion node;
- a second switch transistor connected to the second floating diffusion node and a third floating diffusion node;
- a first capacitor connected to the second floating diffusion node;
- a second capacitor connected to the third floating diffusion node;
- a reset transistor having one end connected to the second floating diffusion node and another end to which a pixel voltage is configured to be applied;
- a source follower transistor having one end connected to the first floating diffusion node and another end to which the pixel voltage is configured to be applied;
- and
- a selection transistor having one end connected to the source follower transistor,
- wherein, the reset transistor is configured to turn on in a first period of an exposure period of the photodiode and to turn off in a second period of the exposure period,
- the first switch transistor is configured to turn on in the first period and the second period of the exposure period, and
- the second switch transistor is configured to turn on in the first period and the second period of the exposure period.
15 more elements
An image sensor including a pixel array in which a plurality of pixels are arranged and a readout circuit, wherein
- each of the plurality of pixels comprises:
- a photodiode;
- a transfer transistor connected between the photodiode and a first floating diffusion node;
- a first switch transistor connected between the first floating diffusion node and a second floating diffusion node;
- a second switch transistor connected between the second floating diffusion node and a third floating diffusion node;
- a first capacitor connected to the second floating diffusion node;
- a second capacitor connected to the third floating diffusion node;
- and
- a reset transistor having one end connected to the third floating diffusion node and another end to which a pixel voltage is applied,
- wherein the first switch transistor is configured to turn off in a first period of a readout period of the photodiode, in which each pixel operates in a high conversion gain (HCG) mode, and to turn on in a second period of the readout period of the photodiode, in which each pixel operates in a low conversion gain (LCG) mode,
- the second switch transistor is configured to turn on in a third period of the readout period of the photodiode, in which each pixel operates in an ultra low conversion gain (ULCG) mode, and is configured to turn off in a first period of an exposure period of the photodiode and to turn on in a second period of the exposure period of the photodiode, and
- the reset transistor is configured to turn on in the first period of the exposure period and to turn off in the second period of the exposure period of the photodiode.
9 more elements
Dependencies are inferred from the claim text.