Solar cell design for improved performance at low temperature

A method, comprising:

• fabricating a panel including at least one solar cell optimized for enhanced operation at temperatures less than about −50° C., the at least one solar cell including:
• a middle cell comprised of an indium gallium arsenide (InGaAs) emitter and a gallium indium arsenide (GaInAs) base deposited on a back surface field (BSF), wherein
• the back surface field is comprised of aluminum gallium arsenide (AlxGa1-xAs) or indium aluminum gallium arsenide (In0.01AlxGa1-xAs), where x is less than 0.8,
• the back surface field forms a heterojunction with the GaInAs base having a barrier height of 90 meV or less in a valance band,
• the back surface field is lattice matched to the GaInAs base for reducing an interfacial recombination velocity of minority carriers at an interface between
• the back surface field and the GaInAs base,
• the back surface field is p-type doped with zinc (Zn), and the back surface field has a valence band offset of less than 100 meV relative to the GaInAs base;
• and
• a nucleation layer surrounded by and in direct contact with a substrate and a buffer, the buffer being surrounded by and in direct contact with the nucleation layer and a tunnel junction.

A method, comprising:

• generating a current using a panel including at least one solar cell optimized for enhanced operation at temperatures less than about −50° C., the at least one solar cell including:
• a middle cell comprised of an indium gallium arsenide (InGaAs) emitter and a gallium indium arsenide (GaInAs) base deposited on a back surface field (BSF),
• the back surface field is comprised of aluminum gallium arsenide (AlxGa1-xAs) or indium aluminum gallium arsenide (In0.01AlxGa1-xAs), where x is less than 0.8,
• the back surface field forms a heterojunction with the GalnAs base having a barrier height of 90 meV or less in a valance band,
• the back surface field is lattice matched to the GaInAs base for reducing an interfacial recombination velocity of minority carriers at an interface between the back surface field and the GaInAs base,
• the back surface field is p-type doped with zinc (Zn), and
• the back surface field has a valence band offset of less than 100 meV relative to the GaInAs base;
• and
• a nucleation layer surrounded by and in direct contact with a substrate and a buffer, the buffer being surrounded by and in direct contact with the nucleation layer and a tunnel junction.

A device, comprising:

• a panel including at least one solar cell having a middle cell (MC) with an emitter, a base and a back surface field (BSF) for enhanced operation of the solar cell at temperatures less than about −50° C.;
• wherein the base is comprised of gallium indium arsenide (GaInAs) deposited on the back surface field, the emitter is comprised of indium gallium arsenide (InGaAs) deposited on the base, and the back surface field is comprised of aluminum gallium arsenide (AlxGa1-xAs) or indium aluminum gallium arsenide (In0.01AlxGa1-xAs), where x is less than 0.8, such that:
• the back surface field has a valence band offset of below 100 meV relative to the GaInAs base;
• the back surface field has either a type-I or type-II band alignment relative to the GaInAs base;
• the back surface field maintains a conduction band offset of greater than 0 meV relative to the GaInAs base, so that the back surface field acts as a hetero-step passivation layer and reflects minority carrier electrons back to a p-n junction to be collected;
• the back surface field is lattice matched to the GaInAs base for reducing an interfacial recombination velocity of the minority carriers at an interface between the back surface field and the base;
• and
• the back surface field is p-type doped with zinc (Zn), and
• a nucleation layer surrounded by and in direct contact with a substrate and a buffer, the buffer being surrounded by and in direct contact with the nucleation layer and a tunnel junction.