Transistor and method for manufacturing the same
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorShunpei Yamazaki
Life of this patent
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Abstract
An object is to provide a highly reliable transistor. In a bottom-gate transistor including an oxide semiconductor layer as a semiconductor layer where a channel is formed, an insulating layer containing excess oxygen is formed over the oxide semiconductor layer, and then an insulating layer through which impurities do not easily pass is formed without exposure to the air. As the insulating layer through which impurities do not easily pass, an aluminum oxide layer or the like can be used. When a conductive layer with a function of absorbing hydrogen is used for a source electrode and a drain electrode, the amount of hydrogen in the oxide semiconductor layer can be reduced.
Claims16
A semiconductor device comprising:
- a gate electrode over a substrate;
- a first insulating layer over the gate electrode;
- a second insulating layer over the first insulating layer;
- a third insulating layer over the second insulating layer;
- an oxide semiconductor layer over the third insulating layer;
- a source electrode and a drain electrode over the oxide semiconductor layer;
- a fourth insulating layer over the source electrode and the drain electrode;
- a fifth insulating layer over the fourth insulating layer;
- and
- a sixth insulating layer over the fifth insulating layer,
- wherein a portion of a top surface of the second insulating layer does not overlap with the third insulating layer, the fourth insulating layer, and the fifth insulating layer,
- wherein the sixth insulating layer is in contact with the portion of the top surface of the second insulating layer, and
- wherein a top surface of the fourth insulating layer in a region not overlapping with the oxide semiconductor layer, the source electrode, and the drain electrode is lower than a bottom surface of the oxide semiconductor layer.
A semiconductor device comprising:
- a gate electrode over a substrate;
- a first insulating layer over the gate electrode;
- a second insulating layer over the first insulating layer;
- a third insulating layer over the second insulating layer;
- an oxide semiconductor layer over the third insulating layer;
- a source electrode and a drain electrode over the oxide semiconductor layer;
- a fourth insulating layer over the source electrode and the drain electrode;
- a fifth insulating layer over the fourth insulating layer;
- and
- a sixth insulating layer over the fifth insulating layer,
- wherein an opening reaching a top surface of the second insulating layer is provided in the third insulating layer, the fourth insulating layer, and the fifth insulating layer,
- wherein the sixth insulating layer is in contact with the second insulating layer in the opening, and
- wherein a top surface of the fourth insulating layer in a region not overlapping with the oxide semiconductor layer, the source electrode, and the drain electrode is lower than a bottom surface of the oxide semiconductor layer.
Dependencies are inferred from the claim text.