US 12,593,499 B2Granted

Silicon carbide semiconductor device and silicon carbide semiconductor substrate

AssigneeFuji Electric Co., Ltd.

InventorsMakoto Utsumi, Masaki Miyazato

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Abstract

First and second buffer regions and an n−-type drift region are sequentially formed by epitaxial growth on an n+-type starting substrate. An impurity concentration of the first buffer region is higher than that of the n−-type drift region and lower than that of the n+-type starting substrate. An impurity concentration of the second buffer region is higher than that of the first buffer region and continuously increases by a first impurity concentration gradient from a first gradient changing point toward the n−-type drift region to a second gradient changing point toward the first buffer region; continuously decreases by a second impurity concentration gradient from the first gradient changing point to a first interface; and continuously decreases by a third impurity concentration gradient from the second gradient changing point to a second interface. The second impurity concentration gradient is lower than the third impurity concentration gradient.

Claims15

Dependent claims

A silicon carbide semiconductor device, comprising:

a semiconductor substrate in which an epitaxial layer is epitaxially grown on a starting substrate containing silicon carbide, and a current flows through the semiconductor substrate in a direction orthogonal to a first main surface of the semiconductor substrate;
a first semiconductor region of a first conductivity type, provided in the epitaxial layer;
a second semiconductor region of the first conductivity type, provided in the epitaxial layer between the first semiconductor region and the starting substrate, the second semiconductor region being in contact with the starting substrate and having an impurity concentration that is higher than an impurity concentration of the first semiconductor region and lower than an impurity concentration of the starting substrate;
and
a third semiconductor region of the first conductivity type, provided in the epitaxial layer between the first semiconductor region and the second semiconductor region, the third semiconductor region being in contact with the first semiconductor region and the second semiconductor region and having an impurity concentration that is higher than the impurity concentration of the second semiconductor region and lower than the impurity concentration of the starting substrate, wherein
the impurity concentration of the third semiconductor region:
continuously increases by a first impurity concentration gradient from a first depth position that is relatively close to a first interface between the third semiconductor region and the first semiconductor region to a second depth position that is relatively close to a second interface between the second semiconductor region and the third semiconductor region, and has a maximum impurity concentration at the second depth position,
continuously decreases by a second impurity concentration gradient from the first depth position to the first interface, and
continuously decreases by a third impurity concentration gradient from the second depth position to the second interface, and
the second impurity concentration gradient is lower than the third impurity concentration gradient.

7 more elements

A silicon carbide semiconductor substrate, comprising:

a starting substrate containing silicon carbide;
an epitaxial layer epitaxially grown on the starting substrate;
a first semiconductor region of a first conductivity type, provided in the epitaxial layer;
a second semiconductor region of the first conductivity type, provided in the epitaxial layer between the first semiconductor region and the starting substrate, the second semiconductor region being in contact with the starting substrate and having an impurity concentration that is higher than an impurity concentration of the first semiconductor region and lower than an impurity concentration of the starting substrate;
and
a third semiconductor region of the first conductivity type, provided in the epitaxial layer between the first semiconductor region and the second semiconductor region, the third semiconductor region being in contact with the first semiconductor region and the second semiconductor region and having an impurity concentration that is higher than the impurity concentration of the second semiconductor region and lower than the impurity concentration of the starting substrate, wherein
the impurity concentration of the third semiconductor region:
continuously increases by a first impurity concentration gradient from a first depth position that is relatively close to a first interface between the third semiconductor region and the first semiconductor region to a second depth position that is relatively close to a second interface between the second semiconductor region and the third semiconductor region, and has a maximum impurity concentration at the second depth position, and
continuously decreases by a second impurity concentration gradient from the first depth position to the first interface, and continuously decreases by a third impurity concentration gradient from the second depth position to the second interface, and
the second impurity concentration gradient is lower than the third impurity concentration gradient.

7 more elements

Dependencies are inferred from the claim text.

Facts

Application: 18/454,147Filed 23 Aug 2023 · continuation
Priority: JP 2021-1441103 Sep 2021
Published: US 2023/0395709 A17 Dec 2023
Granted: 31 Mar 2026
Term ends: Not estimatedThe source records don’t support an estimate.

Classification13 codes

H10D 84/144
The built-in components being PN junction diodes: in antiparallel diode configurations
H10D 12/00
Bipolar devices controlled by the field effect
H10D 30/021
Manufacture or treatment: of FETs having insulated gates [IGFET]
H10D 30/60
Field-effect transistors [FET]: insulated-gate field-effect transistors [IGFET]