Dielectric layer for nanosheet protection and method of forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCheng-I Lin, Shu-Han Chen, Chi On Chui
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCheng-I Lin, Shu-Han Chen, Chi On Chui
Estimating the term…
A device includes a gate stack having a top portion, and a stacked structure underlying the top portion of the gate stack. The stacked structure includes a plurality of semiconductor nanostructures, with upper nanostructures in the plurality of semiconductor nanostructures overlapping respective lower nanostructures. The stacked structure further includes a plurality of gate structures, each including a lower portion of the gate stack. Each of the plurality of gate structures is between two of the plurality of semiconductor nanostructures. A dielectric layer extends on a top surface and a sidewall of the stacked structure. The dielectric layer includes a lower sub layer comprising a first dielectric material, and an upper sub layer over the lower sub layer and formed of a second dielectric material different from the first dielectric material. A gate spacer is on the dielectric layer. A source/drain region is aside of the gate stack.
A method comprising:
A device comprising:
A device comprising:
Dependencies are inferred from the claim text.