Image signal processor and method of processing images

An image signal processor comprising:

• a noise reduction circuit configured to perform a noise reduction operation on a plurality of exposure noise images each respectively corresponding to one of a plurality of brightness levels to generate a plurality of exposure clean images in a first operation mode and configured to perform the noise reduction operation with respect to a single noise image corresponding to one brightness level to generate a single clean image in a second operation mode, the noise reduction circuit comprising:
• a line buffer control circuit configured to buffer and output the plurality of exposure noise images in units of data lines in the first operation mode, and
• a plurality of denoising circuits configured to respectively receive the plurality of exposure noise images from the line buffer control circuit to generate the plurality of exposure clean images in the first operation mode;
• a high dynamic range (HDR) circuit configured to merge the plurality of exposure clean images to generate an HDR image in the first operation mode;
• and
• a post-processing circuit configured to generate an output image by processing the HDR image in the first operation mode and processing the single clean image in the second operation mode,
• wherein the line buffer control circuit comprises:
• a plurality of buffer groups configured to respective store data lines of the plurality of exposure noise images in the first operation mode.

An image signal processor comprising:

• a line buffer control circuit configured to buffer and output a plurality of exposure noise images each respectively corresponding one of a plurality of brightness levels in units of data lines in a first operation mode and buffer and output a single noise image corresponding to one brightness level in units of data lines in a second operation mode;
• a plurality of denoising circuits configured to respectively receive the plurality of exposure noise images from the line buffer control circuit to generate a plurality of exposure clean images in the first operation mode, and configured to receive the single noise image from the line buffer control circuit and generate a single clean image in the second operation mode;
• a normalizing circuit configured to generate a plurality of normalized noise images by increasing a size of pixel data of the plurality of exposure noise images and generate a plurality of normalized clean images by increasing a size of pixel data of the plurality of exposure clean images in the first operation mode;
• a weight generation circuit configured to generate weight values based on the plurality of normalized noise images in the second operation mode;
• a merging circuit configured to generate a high dynamic range (HDR) image by merging the plurality of normalized clean images based on the weight values in the first operation mode;
• and
• a post-processing circuit configured to generate an output image by processing the HDR image in the first operation mode and processing the single clean image in the second operation mode.