Asynchronous analog to digital converter
AssigneeTexas Instruments Incorporated
InventorsVenkatesh Kadlimatti, Rinu Mathew
Life of this patent
Estimating the term…
Abstract
In described examples, an integrated circuit (IC) includes multiple subcircuits. The subcircuits include a first subcircuit that receives a current and sinks a portion of the current that is responsive to a threshold. In response to the current being greater than the threshold, the first subcircuit provides a difference between the current and the portion to a second subcircuit and asserts a signal corresponding to an ordinality of the first subcircuit. The second subcircuit is configured to repeat the actions with respect to the first subcircuit, with the second subcircuit in place of the first subcircuit and a third subcircuit in place of the second subcircuit, and with the difference in place of the current, in response to the IC comprising the third subcircuit.
Claims20
A circuit comprising:
- a first current source having a terminal and configured to provide a first current at the terminal;
- a second current source having a terminal and configured to provide a second current at the terminal;
- an operational amplifier (op-amp) having a first input, a second input, and an output;
- multiple first transistors each having a first terminal, a second terminal, and a gate, the gates of the first transistors coupled together, and the first terminal of a first one of the first transistors coupled to the second input of the op-amp and the terminal of the first current source;
- a second transistor having a first terminal, a second terminal, and a gate;
- and
- multiple third transistors each having a first terminal, a second terminal, and a gate, the gates of the third transistors coupled to the first terminal and the gate of the second transistor and to the terminal of the second current source, the first terminals of the third transistors coupled to second terminals of corresponding ones of the first transistors, and the second terminals of the third transistors coupled together;
- wherein the first transistors are coupled in series between the terminal of the first current source and the first terminal of one of the third transistors, so that first terminals of first transistors other than the first one of the first transistors are coupled to second terminals of respective ones of the first transistors.
A circuit comprising:
- a first subcircuit configured to receive a first current, and in response to the first current being greater than a first reference current, provide a second current and a first output signal, wherein the second current is a difference between the first current and the first reference current;
- and
- a second subcircuit coupled to the first subcircuit, wherein the second subcircuit is configured to receive the second current, and in response to the second current being greater than the first reference current, provide a third current and a second output signal, wherein the third current is a difference between the second current and the first reference current.
A system comprising:
- an analog to digital converter including:
- a first current source having a terminal and configured to provide a first current at the terminal;
- a second current source having a terminal and configured to provide a second current at the terminal;
- an operational amplifier (op-amp) having a first input, a second input, and an output;
- a first transistor having a first terminal coupled to the terminal of the first current source, a second terminal, and a gate;
- a second transistor having a first terminal coupled to the second terminal of the first transistor, a second terminal, and a gate coupled to the gate of the first transistor;
- a third transistor having a first terminal, a second terminal, and a gate;
- a fourth transistor having a first terminal coupled to the second terminal of the first transistor, a second terminal, and a gate coupled to the first terminal and the gate of the third transistor and to the terminal of the second current source;
- a fifth transistor having a first terminal coupled to the second terminal of the second transistor, a second terminal coupled to the second terminal of the fourth transistor, and a gate coupled to the first terminal and the gate of the third transistor and to the terminal of the second current source;
- and
- an output circuit having a first control terminal coupled to the second terminal of the first transistor, a second control terminal coupled to the second terminal of the second transistor, a first output terminal, and a second output terminal;
- a control circuit including a first input coupled to the first output terminal of the output circuit, a second input coupled to the second output terminal of the output circuit, and an output;
- a gate driver including an input and an output, the input of the gate driver coupled to the output of the control circuit;
- and
- a voltage regulator including a switch having a control terminal, the control terminal of the switch coupled to the output of the gate driver.
Dependencies are inferred from the claim text.