Calibration circuit to suppress non-linearity

A calibration circuit comprising:

• a multi-phase clock generator configured to receive a clock signal and generate a multi-phase clock output;
• a pre-skew buffer configured to receive the multi-phase clock output and generate multiple data signals;
• a phase interpolator (PI) configured to receive the multiple data signals and generate a shifted clock signal of the clock signal received by the multi-phase clock generator;
• and
• a phase detection circuit configured to generate a calibration code and a PI code, the calibration code fed to the multi-phase clock generator and the pre-skew buffer, and the PI code fed to the PI to adjust non-linearity of the PI.

A method comprising:

• feeding a multi-phase clock generator with a clock signal and generating a multi-phase clock output;
• sending the multi-phase clock output to a pre-skew buffer and generating multiple data signals;
• sending the multiple data signals to a phase interpolator (PI) and generating a shifted clock signal of the clock signal received by the multi-phase clock generator;
• and
• generating, using a phase detection circuit, a calibration code and a PI code, the calibration code fed to the multi-phase clock generator and the pre-skew buffer, and the PI code fed to the PI to adjust non-linearity of the PI.