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US 12,592,689 B2Granted
Method, system, and device for sleep mode recovery
AssigneeTexas Instruments Incorporated
InventorsMark A. Wolfe, Harsh D. Jhaveri
Life of this patent
Estimating the term…
Abstract
A circuit including a device including a receiver having a receiver input, a receiver output, and a bias current input and a bias generator having a bias current output coupled to the bias current input. The device also includes a buffer having a buffer input, an enable input, and a buffer output, the buffer input coupled to the receiver output and a delay circuit having a delay output coupled to the enable input.
Claims20
A circuit comprising:
- a device comprising:
- a receiver having a receiver input, a receiver output, an enable input, and a bias current input;
- a bias generator having an enable input, and a bias current output coupled to the bias current input;
- a buffer having a buffer input, an enable input, and a buffer output, the buffer input coupled to the receiver output;
- and
- a delay circuit having an enable input coupled to the enable input of the receiver and to the enable input of the bias generator, and a delay output coupled to the enable input of the buffer.
3 more elements
A system comprising:
- a controller comprising a transmitter having a transmitter output;
- and
- a device coupled to the controller, the device comprising:
- a receiver having a receiver input, a bias current input, and a receiver output, the receiver input coupled to the transmitter output;
- and
- a bias generator having a bias current output coupled to the bias current input, the bias generator comprising:
- a quick turn on circuit;
- a capacitor coupled to the quick turn on circuit and to the bias current output;
- and
- a time control circuit coupled to the quick turn on circuit, the time control circuit configured to:
- in response to receiving a system enable signal, instruct the quick turn on circuit to turn on to charge the capacitor;
- and
- in a time period after receiving the system enable signal, instruct the quick turn on circuit to turn off.
10 more elements
A circuit comprising:
- a buffer having a buffer input, a buffer output, and an enable input;
- and
- a delay circuit having a delay output coupled to the enable input, the delay circuit is configured to implement a timer function, in which the delay circuit is configured to:
- in response to receiving a system enable signal, produce a buffer enable signal having a first value the delay output;
- and
- a time period after receiving the system enable signal, produce the buffer enable signal having a second value at the delay output, the second value different than the first value.
3 more elements
Dependencies are inferred from the claim text.