Voltage scalable level shifter
AssigneeSynopsys, Inc.
InventorsSayan Adhikary, Ankit Agrawal
Life of this patent
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Abstract
A circuit. In some embodiments, the circuit includes: a first pair of transistors, configured as a cross-coupled pair of transistors; a second pair of transistors, configured as another cross-coupled pair of transistors; and a first series combination of one or more voltage clamping transistors. A first transistor of the first pair of transistors may have a current-carrying terminal electrically coupled to a first end terminal of the first series combination of one or more voltage clamping transistors, and a first transistor of the second pair of transistors may have a first current-carrying terminal electrically coupled to a second end terminal of the first series combination of one or more voltage clamping transistors.
Claims18
A circuit comprising:
- a first pair of transistors, configured as a cross-coupled pair of transistors;
- a second pair of transistors, configured as another cross-coupled pair of transistors;
- a first series combination of one or more voltage clamping transistors;
- a gate-driving transistor having a first current-carrying terminal connected to a first reference voltage and a second current-carrying terminal connected to a control terminal of a second transistor of the second pair of transistors;
- and
- a capacitor connected between a control terminal of the gate-driving transistor and a current-carrying terminal of the gate-driving transistor,
- a first transistor of the first pair of transistors having a current-carrying terminal electrically coupled to a first end terminal of the first series combination of one or more voltage clamping transistors, and
- a first transistor of the second pair of transistors having a first current-carrying terminal electrically coupled to a second end terminal of the first series combination of one or more voltage clamping transistors.
A circuit, comprising:
- a first transistor of a first pair of transistors configured as a cross-coupled pair of transistors, the first transistor having a first current-carrying terminal connected to an upper reference voltage;
- a first transistor of a second pair of transistors, configured as a cross-coupled pair of transistors;
- a second transistor, connected to a lower reference voltage;
- a gate-driving transistor having a first current-carrying terminal connected to a first reference voltage and a second current-carrying terminal connected to a control terminal of a second transistor of the second pair of transistors;
- and
- a capacitor connected between a control terminal of the gate-driving transistor and a current-carrying terminal of the gate-driving transistor,
- the circuit having a complementary pair of inputs and a first complementary pair of outputs,
- the circuit being configured to produce, in a first state, on a second current-carrying terminal of the first transistor, a first voltage, the first voltage being, relative to the lower reference voltage, greater than twice a maximum stress voltage of the first transistor.
A method, comprising:
- operating, by a level shifter, in a first state;
- and
- operating, by the level shifter, in a second state,
- the operating in the first state comprising translating, by a stress limiter stage, each of two input voltages of the stress limiter stage by a voltage increment to form two respective output voltages of the stress limiter stage each higher than the respective input voltage by the voltage increment, the voltage increment being less than or equal to a maximum stress voltage of a transistor of the level shifter, the stress limiter stage comprising:
- a cross-coupled pair of transistors;
- a gate-driving transistor having a first current current-carrying terminal connected to a first reference voltage and a second current-carrying terminal connected to a control terminal of a transistor of the cross-coupled pair of transistors;
- and
- a capacitor connected between a control terminal of the gate-driving transistor and a current-carrying terminal of the gate-driving transistor,
- the level shifter having an input and an output,
- a voltage difference between the input and the output being, in each of the first state and the second state, equal to at least 1.5 times a maximum stress voltage of a transistor of the level shifter.
Dependencies are inferred from the claim text.