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US 12,592,670 B2Granted
Efficient common mode suppression for transmission systems
AssigneeAvago Technologies International Sales Pte. Limited
InventorsMd Shakil Akter, Jan Mulder, Han Yan
Life of this patent
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Abstract
In some aspects, the disclosure is directed to methods and systems for an amplifier having common mode feedback inputs. The inputs are coupled to various points within an amplifier wherein a first set of directly coupled common mode feedback inputs join the amplifier one or more nodes, and a second set of capacitively coupled common mode feedback inputs are joined to the amplifier at one or more different nodes.
Claims20
A device, comprising:
- an amplifier, comprising:
- a first amplifier stage, comprising:
- a pair of first input ports configured to receive a differential input signal at a first pair of gates of a first pair of transistors,
- a pair of second input ports configured to receive a common mode reference at a second pair of gates of a second pair of transistors, and
- a first pair of inter-stage outputs configured to deliver a pair of amplified signals from the first amplifier stage to a pair of gates of a third pair of transistors of a second amplifier stage;
- and
- the second amplifier stage, further comprising:
- a first pair of current sources, and
- a second pair of current sources,
- a feedback network coupled between an output of the amplifier and the first amplifier stage or the second amplifier stage, the feedback network comprising:
- a first pair of feedback inputs directly coupled to the first amplifier stage, or
- a second pair of feedback inputs capacitively coupled to the first pair of current sources, or
- a third pair of feedback inputs capacitively coupled to the second pair of current sources.
10 more elements
A system, comprising:
- a first amplifier stage of an amplifier, comprising:
- a pair of first input ports configured to receive a differential input signal at a first pair of gates of a first pair of transistors,
- a pair of second input ports configured to receive a common mode reference at a second pair of gates of a second pair of transistors, and
- a first pair of inter-stage outputs configured to deliver a pair of amplified signals from the first amplifier stage to a pair of gates of a third pair of transistors of a second amplifier stage;
- and
- the second amplifier stage, further comprising:
- a first pair of high side current sources, and
- a second pair of low side current sources,
- a feedback network coupled between an output of the amplifier and the first amplifier stage or the second amplifier stage, the feedback network comprising:
- a first pair of feedback inputs directly coupled to the first amplifier stage;
- a second pair of feedback inputs capacitively coupled to the first pair of high side current sources;
- and
- a third pair of feedback inputs capacitively coupled to the second pair of low side current sources.
10 more elements
A method, comprising:
- receiving, at a first stage of an amplifier:
- a differential data signal at first input gates of first transistors of respective portions of the first stage;
- a common mode reference signal at second input gates of second transistors of respective portions of the first stage;
- and
- a first differential feedback input at third inputs intermediate to the first transistors and the second transistors;
- generating, by the first stage of the amplifier:
- a differential inter-stage output based on the differential data signal, the common mode reference signal, and the first differential feedback input;
- receiving, by a second stage of the amplifier:
- a second differential feedback input at a high side current source at respective portions of the second stage;
- a third differential feedback input at a low side current source at respective portions of the second stage, wherein the differential inter-stage output intermediate to the high side current source and the low side current source at respective portions of the second stage;
- generating, by the second stage of the amplifier, an output based on the differential inter-stage output, the second differential feedback input, and the third differential feedback input.
8 more elements
Dependencies are inferred from the claim text.