Systems and methods for power switch control for inverter for electric vehicle

A method comprising performing, by one or more controllers, operations including:

• receiving a pulse to control an operation of a power switch;
• generating, based on the received pulse, a first signal to the power switch to increase a gate voltage level of the power switch at a first rate from an off-state gate voltage level to a first on-state gate voltage level in a first time period,
• generating, based on the received pulse, a second signal to the power switch to increase the gate voltage level of the power switch at a second rate, less than the first rate, to a second on-state gate voltage level in a second time period subsequent to the first time period, and
• generating, based on the received pulse, a third signal to the power switch to decrease the gate voltage level of the power switch from the first on-state gate voltage level to a third on-state gate voltage level, lower than the first on-state gate voltage level, in a third time period subsequent to the first time period and preceding the second time period.

A method comprising performing, by one or more controllers, operations including:

• receiving a pulse to control an operation of a power switch;
• generating a gate signal based on the pulse;
• generating, based on the received gate signal, a first signal to the power switch to increase a gate voltage level of the power switch at a first rate from an off-state gate voltage level to a first on-state gate voltage level in a first time period;
• generating, based on the received gate signal, a second signal to the power switch to increase the gate voltage level of the power switch at a second rate, less than the first rate, to a second on-state gate voltage level in a second time period subsequent to the first time period, and
• generating, based on the received gate signal, a third signal to the power switch to decrease the gate voltage level of the power switch from the first on-state gate voltage level to a third on-state gate voltage level, lower than the first on-state gate voltage level, in a third time period subsequent to the first time period and preceding the second time period.