Field device current limiting
AssigneeRosemount Inc.
InventorsYevgeny Yurevich Korolev, William Michael Mansfield, Xiong Gao
Life of this patent
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Abstract
A current limiting circuit for limiting a current through a pair of terminals powered from a 2-wire Advanced Physical Layer (APL) spur includes a current source, a first current limiter and a second current limiter. The current source is connected to one of the terminals and is configured to source a current that is conducted through the terminals and has an amplitude that is at a current source threshold. The first current limiter is connected to the current source and is configured to limit the amplitude below a first threshold. The second current limiter is connected to the first current limiter and is configured to limit the amplitude below a second threshold.
Claims18
A current limiting circuit for limiting a current through a pair of terminals powered from a 2-wire Advanced Physical Layer (APL) spur, the current limiting circuit comprising:
- a current source connected to one of the terminals and configured to source a current conducted through the terminals having an amplitude that is at a current source threshold;
- a first current limiter connected to the current source and configured to limit the amplitude below a first threshold;
- and
- a second current limiter connected to the first current limiter and configured to limit the amplitude below a second threshold,
- wherein:
- the current source includes a pass transistor through which the current travels;
- the current travels through first and second terminals of the pass transistor;
- and
- the amplitude of the current is based on a voltage at a third terminal of the pass transistor, which is disconnected from the first and second terminals.
A field device for an industrial process comprising:
- a pair of terminals configured to receive power from a 2-wire Advanced Physical Layer (APL) spur;
- a current limiting circuit configured to limit a current through the terminals comprising:
- a current source connected to one of the terminals and configured to source a current conducted through the terminals having an amplitude that is at a current source threshold;
- a first current limiter connected to the current source and configured to limit the amplitude below a first threshold;
- and
- a second current limiter connected to the first current limiter and configured to receive the current from the first current limiter and limit the amplitude below a second threshold;
- and
- field device circuitry connected to the second current limiter and powered using the current,
- wherein:
- the current source includes a pass transistor through which the current travels;
- and
- an emitter of the pass transistor is disconnected from a base of the transistor.
A method of controlling a current in a field device, which includes a pair of terminals, field device circuitry and a current limiting circuit that includes a current source connected to one of the terminals, a first current limiter connected to the current source, and a second current limiter connected to the first current limiter and the field device circuitry, the method comprising:
- receiving power from a 2-wire Advanced Physical Layer (APL) spur at the pair of terminals;
- sourcing a current conducted through the terminals using the current source, which limits an amplitude of the current to a current source threshold;
- receiving the current from the current source at the first current limiter;
- limiting the amplitude of the current below a first threshold using the first current limiter;
- receiving the current from the first current limiter at the second current limiter;
- limiting the amplitude of the current below a second threshold using the second current limiter;
- and
- powering field device circuitry using the current,
- wherein:
- the current source includes a pass transistor through which the current travels;
- the current travels through first and second terminals of the pass transistor;
- and
- the amplitude of the current is based on a voltage at a third terminal of the pass transistor, which is disconnected from the first and second terminals.
Dependencies are inferred from the claim text.