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US 12,592,334 B2Granted
Stacked magnetic inductor and method
AssigneeIntel Corporation
InventorsNumair Ahmed, Kyu Oh Lee, Sri Chaitra Jyotsna Chavali, Vijaya Boddu, Krishna Bharath, Robert L. Sankman
Life of this patent
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Abstract
An electronic device and associated methods are disclosed. In one example, the electronic device includes a package with integrated inductors. In selected examples, the package includes a core layer having a core thickness and through holes. The package further includes inductor structures within the through holes, such that an inductor structure has a length exceeding the core thickness.
Claims23
A package structure with integrated inductors, comprising:
- a core layer having a core thickness;
- a plurality of laminate substrate layers on the core layer, the plurality of laminate substrate layers having a higher coefficient of thermal expansion (CTE) than a CTE of the core layer, and a plurality of via layers within the laminate substrate layers, the plurality of via layers having not fewer than three via layers;
- a plated through hole extending through the core layer and coupled to a lower-most one of the plurality of via layers adjacent the core layer;
- and
- an inductor comprising a magnetic material surrounding a conductive material, the magnetic material and the conductive material each having a length exceeding the core thickness, the inductor extending through the core layer and a portion of the plurality of laminate substrate layers beyond the lower-most one of the plurality of via layers to couple to an upper-most one of the plurality of via layers distal the core layer such that the length of each of the magnetic material and the conductive material extends beyond the lower-most one of the plurality of via layers and at least one via layer between the lower-most one of the plurality of via layers and the upper-most one of the plurality of via layers.
2 more elements
A package structure with integrated inductors, comprising:
- a core layer having a core thickness, the core layer comprising a ceramic material;
- laminate substrate layers on the core layer, the laminate substrate layers having a higher coefficient of thermal expansion (CTE) than a CTE of the core layer, and not fewer than three via layers within the laminate substrate layers, the via layers comprising a lower-most via layer adjacent the core layer, an upper-most via layer distal the core layer, and one or more middle via layers between the lower-most via layer and the upper-most via layer;
- a plated through hole extending through the core layer and coupled to a bottom of the lower-most via layer;
- and
- an inductor comprising a magnetic material surrounding a conductive material, the magnetic material and the conductive material each having a length exceeding the core thickness, the inductor extending through the core layer and beyond the lower-most via layer and the one or more middle via layers to couple to a bottom of the upper-most via layer such that the length of each of the magnetic material and the conductive material extends beyond the lower-most via layer and the one or more middle via layers.
2 more elements
Dependencies are inferred from the claim text.