Memory, memory system, program method of memory, and electronic apparatus
AssigneeYangtze Memory Technologies Co., Ltd.
InventorsHongtao Liu, Ying Huang, Lei Guan, Lei Jin
Life of this patent
Estimating the term…
Abstract
The present disclosure discloses a memory, a memory system, a program method of a memory, and an electronic apparatus, relating to the technical field of memories. The memory includes a memory array and a peripheral circuit, wherein the memory array includes memory cells; the peripheral circuit is configured to perform a first program operation on the memory cells, perform a read operation on a memory page through a preset read voltage, and perform a second program operation on the memory cells in a case where a fail bit count read based on the read voltage meets a preset requirement.
Claims20
A memory, comprising:
- a memory array comprising memory cells;
- and
- a peripheral circuit configured to:
- perform a first program operation on the memory cells;
- perform a read operation on the memory cells;
- determine a program result of the first program operation, corresponding to a fail bit count (FBC) read, by one of:
- determining the program result based on a first comparison of a first preset number with a difference in a first number of memory cells between two adjacent preset read voltages of a plurality of preset read voltages, wherein the first comparison, between the first preset number and the difference, determines whether error correction of the program result is performed and error-corrected data is received;
- or
- determining the program result based on a second comparison of a second preset number with a second number of memory cells within a preset offset range of a default read level, the plurality of preset read voltages being configured as the default read level, wherein the second comparison, between the second preset number and the second number, determines whether the error correction of the program result is performed and the error-corrected data is received;
- and
- when the fail bit count (FBC) read corresponding to the program result meets a preset requirement, perform a second program operation on the memory cells.
A memory system, comprising:
- a memory comprising a memory array that includes memory cells;
- and
- a memory controller configured to send first program data to the memory;
- wherein the memory is configured to:
- perform a first program operation on the memory cells according to the first program data;
- perform a read operation on the memory cells;
- determine a program result of the first program operation, corresponding to a fail bit count (FBC) read, by one of:
- determining the program result based on a first comparison of a first preset number with a difference in a first number of memory cells between two adjacent preset read voltages of a plurality of preset read voltages, wherein the first comparison, between the first preset number and the difference, determines whether error correction of the program result is performed and error-corrected data is received;
- or
- determining the program result based on a second comparison of a second preset number with a second number of memory cells within a preset offset range of a default read level, the plurality of preset read voltages being configured as the default read level, wherein the second comparison, between the second preset number and the second number, determines whether the error correction of the program result is performed and the error-corrected data is received;
- and
- when the fail bit count read corresponding to the program result meets a preset requirement, send first information to the memory controller;
- the memory controller is further configured to receive the first information and send second program data to the memory;
- and
- the memory is further configured to perform a second program operation on the memory cells according to the first program data and the second program data.
A method of programming a memory, comprising:
- performing a first program operation on memory cells;
- performing a read operation on the memory cells through a plurality of preset read voltages;
- and
- when a fail bit count read based on a program result of the first program operation that the plurality of preset read voltages meets a preset requirement, performing a second program operation on the memory cells, comprising:
- based on a difference in a number of memory cells between two adjacent preset read voltages of the plurality of preset read voltages and a first preset number, determining whether to perform the second program operation on the memory cells, wherein a comparison, between the first preset number and the difference, determines whether error correction of the program result is performed and error-corrected data is received.
Dependencies are inferred from the claim text.