Memory device performing program operation and method of operating the same

A method of operating a memory device, the method comprising:

• storing, in at least one data latch, at least one second logical page data except for first logical page data among a plurality of logical page data;
• performing a program operation on a plurality of memory cells based on the at least one second logical page data;
• storing the first logical page data in the at least one data latch;
• determining, based on logic values of the first logical page data, first memory cells having a target threshold voltage distribution among the plurality of memory cells;
• controlling the first memory cells determined as having the target threshold voltage distribution based on the logic values of the first logical page data to be set as program inhibit cells;
• and
• performing a program operation on second memory cells except for the first memory cells among the plurality of memory cells based on the at least one second logical page data.

A memory device comprising:

• a plurality of memory cells connected to a selected word line among a plurality of word lines, including a triple level cell (TLC) storing three bits of data;
• a plurality of page buffers configured to store least significant bit (LSB) data and central significant bit (CSB) data in a plurality of first program loops, and store most significant bit (MSB) data after the plurality of first program loops are performed, the LSB data and the CSB data being data to be stored in the plurality of memory cells, the plurality of first program loops being performed on the plurality of memory cells;
• and
• a control logic configured to:
• control the plurality of first program loops based on the LSB data and the CSB data;
• determine, based on logic values of the MSB data, first memory cells having a target threshold voltage distribution among the plurality of memory cells;
• control the first memory cells determined as having the target threshold voltage distribution based on the logic values of the MSB data to be set as program inhibit cells;
• and
• control a plurality of second program loops performed on second memory cells based on the LSB data and the CSB data, the first memory cells having a target threshold voltage among the plurality of memory cells, the second memory cells being memory cells except for the first memory cells among the plurality of memory cells.