Semiconductor memory device with sense amplifier that operates for two different voltage range and writing method thereof
AssigneeWinbond Electronics Corp.
InventorsYing-Te Tu, Hsi-Yuan Wang
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device and a writing method thereof. The semiconductor memory device includes a memory control circuit and a memory array. The memory array includes a target memory bank. The target memory bank includes a target memory cell and a sense amplifier circuit. The sense amplifier circuit is coupled to the target memory cell via a bit line, receives a data signal within a first voltage value range from the memory control circuit, and generates a bit line signal within a second voltage value range on the bit line according to the data signal. The second voltage value range is greater than the first voltage value range.
Claims8
A semiconductor memory device, comprising:
- a memory control circuit;
- and
- a memory array, coupled to the memory control circuit, the memory array comprising a target memory bank,
- wherein the target memory bank comprises:
- a target memory cell, coupled to a bit line;
- and
- a sense amplifier circuit, coupled to the target memory cell via the bit line, receiving a data signal within a first voltage value range from the memory control circuit, and generating a bit line signal within a second voltage value range on the bit line according to the data signal, and the second voltage value range being greater than the first voltage value range,
- wherein the sense amplifier circuit comprises:
- an amplifier circuit, operating under a power voltage within the second voltage value range, configured to, during a write operation to the target memory cell, use the power voltage to pull up data potential on a data line coupled to the bit line in response to a precharge signal, and then pull down the data potential in response to the data signal, thereby changing a voltage value of the bit line signal.
A writing method of a semiconductor memory device, comprising:
- receiving a data signal within a first voltage value range;
- and
- generating a bit line signal within a second voltage value range on a bit line coupled to a target memory cell according to the data signal, and the second voltage value range being greater than the first voltage value range,
- wherein generating the bit line signal within the second voltage value range on the bit line coupled to the target memory cell according to the data signal comprises:
- during a write operation to the target memory cell, using a power voltage within the second voltage value range to pull up data potential on a data line coupled to the bit line in response to a precharge signal, and then pulling down the data potential in response to the data signal, thereby changing a voltage value of the bit line signal.
Dependencies are inferred from the claim text.