Devices, methods, and systems for calibrating a read voltage used for reading memory cells

Abstract

Disclosed herein are devices, methods, and systems for calibrating a read voltage level for reading memory cells of a memory. The calibration circuit includes a reference cell associated with a predefined programming state of the reference cell. The calibration circuit also includes a read circuit configured to (e.g., until a read state of the reference cell matches the predefined programming state), perform a read operation on the reference cell at a reference read voltage level to obtain a read state of the reference cell and adjust the reference read voltage level to an adjusted reference read voltage level based on a comparison between the read state and the predefined programming state. The read circuit is configured to provide the adjusted reference read voltage level to the memory as the read voltage level for reading the memory cells of the memory.

Dependencies are inferred from the claim text.