Magnetoresistive memory device and method of operating same using phase controlled magnetic anisotropy
AssigneeSanDisk Technologies LLC
InventorsAlan Kalitsov, Derek Stewart, Bhagwati Prasad
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Abstract
A magnetoresistive memory cell includes a first terminal electrode, a second terminal electrode, and a magnetoresistive layer stack located between the first terminal electrode and the second terminal electrode and including, from one side to another, a reference layer, a dielectric tunnel barrier layer, a free layer, and a material layer having two different states of lattice deformation which have different average in-plane lattice constants and which are configured to apply different in-plane stress. The material layer may be a metal-insulator transition (MIT) material layer that exhibits a phase transition between an insulator state and a metal state.
Claims20
A memory device comprising a magnetoresistive memory cell which comprises:
- a first terminal electrode;
- a second terminal electrode;
- and
- a magnetoresistive layer stack located between the first terminal electrode and the second terminal electrode and comprising, from one side to another, a reference layer, a dielectric tunnel barrier layer, a free layer, and a material layer having two different states of lattice deformation which have different average in-plane lattice constants and which are configured to apply different in-plane stress, wherein:
- the free layer is in direct contact with the dielectric tunnel barrier layer on one side and is in direct contact with the material layer on another side;
- the material layer comprises a metal-insulator transition (MIT) material layer that exhibits a phase transition between an insulator state and a metal state;
- the memory device further comprises a programming circuit configured to apply a programming voltage pulse between the first terminal electrode and the second terminal electrode, the programming voltage pulse inducing a programming electrical current having a magnitude sufficient to induce a Joule-heating-induced phase transition from the insulator state into the metal state in the MIT material layer and to cause a reduction in a perpendicular magnetic anisotropy of the free layer that allows a spin-transfer torque switching of the free layer while the MIT material layer is in the metal state;
- and
- the magnetoresistive layer stack is configured to restore the perpendicular magnetic anisotropy of the free layer to a magnitude sufficient to store written information in the free layer after the MIT material layer reverts to the insulator state upon cooling after the programming voltage pulse is turned off.
A method of operating the magnetoresistive memory cell comprising a first terminal electrode, a second terminal electrode, and a magnetoresistive layer stack located between the first terminal electrode and the second terminal electrode and comprising, from one side to another, a reference layer, a dielectric tunnel barrier layer, a free layer, and a metal-insulator transition (MIT) material layer in direct contact with the free layer, the method comprising:
- applying a programming voltage pulse between the first terminal electrode and the second terminal electrode, the programming voltage pulse inducing a programming electrical current having a magnitude sufficient to induce a Joule-heating-induced phase transition from the insulator state into the metal state in the MIT material layer and to cause a reduction in a perpendicular magnetic anisotropy of the free layer that allows a spin-transfer torque switching of the free layer while the MIT material layer is in the metal state;
- and
- cooling the MIT material layer to revert to the insulator state after the programming voltage pulse is turned off, thereby restoring the perpendicular magnetic anisotropy of the free layer to a magnitude sufficient to store written information in the free layer.
A memory device comprising a magnetoresistive memory cell which comprises:
- a first terminal electrode;
- a second terminal electrode;
- a magnetoresistive layer stack located between the first terminal electrode and the second terminal electrode and comprising, from one side to another, a reference layer, a dielectric tunnel barrier layer, a free layer, and a metal-insulator transition (MIT) material layer that exhibits a phase transition between an insulator state and a metal state which comprise different states of lattice deformation having different average in-plane lattice constants and which are configured to apply different in-plane stress, wherein the free layer is in direct contact with the dielectric tunnel barrier layer on one side and is in direct contact with the material layer on another side;
- a programming circuit configured to apply a programming voltage pulse between the first terminal electrode and the second terminal electrode, the programming voltage pulse inducing a programming electrical current having a magnitude sufficient to induce a Joule-heating-induced phase transition from the insulator state into the metal state in the MIT material layer and to cause a reduction in a perpendicular magnetic anisotropy of the free layer that allows a spin-transfer torque switching of the free layer while the MIT material layer is in the metal state;
- and
- a sensing circuit configured to apply a sensing voltage pulse across the magnetoresistive memory cell while the MIT material layer is in the insulator state, wherein a magnitude of the sensing voltage pulse is insufficient to induce a phase transition in the MIT material layer and enables retrieval of data stored in the free layer through a tunneling magnetoresistance effect,
- wherein the magnetoresistive layer stack is configured to restore the perpendicular magnetic anisotropy of the free layer to a magnitude sufficient to store written information in the free layer after the MIT material layer reverts to the insulator state upon cooling after the programming voltage pulse is turned off.
Dependencies are inferred from the claim text.