Dual-voltage pixel circuitry for liquid crystal display
AssigneeSnap Inc.
InventorsJames L. Sanford, Howard V. Goetz, Stewart S. Taylor
Life of this patent
Estimating the term…
Abstract
Systems and methods for a digital pixel circuit for liquid crystal displays are provided. The design includes a dual-voltage pixel design, a two-transistor level-shift circuit design, self-adjusting transistor bias circuitry; and an optional on-chip test-array to determine die-specific design-center values for critical transistor leakage and threshold parameters. Level shift design simplicity, small pixel pitch, and applicability for small display applications such as microdisplays, are among the various benefits and advantages obtained.
Claims20
A display comprising:
- a plurality of pixels, each comprising a pixel electrode;
- for each pixel electrode, a pixel circuit for supplying an output voltage to the pixel electrode, each pixel circuit comprising:
- a plurality of memory storage units operating at a core voltage;
- a level shift circuit connected to at least one of the plurality of memory storage units and comprising a first transistor and a second transistor, the level shift circuit converting the core voltage to an output voltage supplied to the pixel electrode, the core voltage being lower than the output voltage;
- and
- a plurality of update circuits, each update circuit being connected to a corresponding group of the pixels to provide an update signal to level shift circuits in its corresponding group of pixels, the update circuits being configured to provide their respective update signals with predetermined delays relative to each other to distribute current surge across the display.
A display comprising a pixel circuit for supplying an output voltage to a pixel electrode in the display, the pixel circuit comprising:
- a plurality of memory storage units operating at a core voltage;
- a level shift circuit connected to at least one of the plurality of memory storage units and comprising a first transistor and a second transistor, the level shift circuit converting the core voltage to an output voltage supplied to the pixel electrode, the core voltage being lower than the output voltage;
- and
- a plurality of update circuits, each update circuit being connected to a corresponding group of pixels of the display to provide an update signal to level shift circuits in its corresponding group of pixels, the update circuits being configured to provide their respective update signals with predetermined delays relative to each other to distribute current surge across the display.
A method, comprising:
- operating one portion of a pixel circuit at a core voltage, the one portion of the pixel circuit comprising a plurality of memory storage units;
- operating another portion of the pixel circuit at an output voltage using a level shift block, the core voltage being lower than the output voltage;
- providing an update signal to a group of pixels via level shift blocks of the group of pixels, the update signal having a predetermined delay relative update signals provided to other groups of pixels to distribute current surge across a display;
- and
- supplying the output voltage to a pixel electrode of the display.
Dependencies are inferred from the claim text.