Non-transitory computer-readable recording medium storing simulation program, simulation method, and information processing device

A simulation method implemented by a computer of performing a simulation of surface code-based quantum error correction in a quantum computer by utilizing the computer being a classical computer, the simulation method comprising:

• generating qubit information that indicates a two-dimensional lattice in which a plurality of data qubits and a plurality of auxiliary qubits are alternately arranged in each of a row direction and a column direction;
• setting, for the qubit information, error information that indicates error occurrence in a first data qubit among the plurality of data qubits;
• setting, for the qubit information, error detection information obtained by inverting, from an initial value, a state of an auxiliary qubit adjacent to the first data qubit in the row direction or the column direction;
• setting, for the qubit information, error correction information that indicates a second data qubit to be subjected to error correction by a surface code based on the error detection information;
• and
• determining presence or absence of occurrence of a logical error, wherein the determining includes:
• identifying, from among the plurality of data qubits in the two-dimensional lattice, a set of data qubits within a single row or a single column in the two-dimensional lattice,
• counting, within the identified set of data qubits, a number of inverted data qubits each of which corresponds to either the first data qubit or the second data qubit, but not both, and
• determining that a logical error has occurred when the counted number of inverted data qubits is an odd number.

An information processing apparatus of performing a simulation of surface code-based quantum error correction in a quantum computer by utilizing the information processing apparatus being a classical computer, the information processing apparatus comprising:

• a memory;
• and
• a processor coupled to the memory, the processor being configured to perform processing including:
• generating qubit information that indicates a two-dimensional lattice in which a plurality of data qubits and a plurality of auxiliary qubits are alternately arranged in each of a row direction and a column direction;
• setting, for the qubit information, error information that indicates error occurrence in a first data qubit among the plurality of data qubits;
• setting, for the qubit information, error detection information obtained by inverting, from an initial value, a state of an auxiliary qubit adjacent to the first data qubit in the row direction or the column direction;
• setting, for the qubit information, error correction information that indicates a second data qubit to be subjected to error correction by a surface code based on the error detection information;
• and
• determining presence or absence of occurrence of a logical error, wherein the determining includes:
• identifying, from among the plurality of data qubits in the two-dimensional lattice, a set of data qubits within a single row or a single column in the two-dimensional lattice,
• counting, within the identified set of data qubits, a number of inverted data qubits each of which corresponds to either the first data qubit or the second data qubit, but not both, and
• determining that a logical error has occurred when the counted number of inverted data qubits is an odd number.