Integrated circuit including standard cell and method of designing the integrated circuit
AssigneeSamsung Electronics Co., Ltd.
InventorsJungho Do, Jisu Yu, Hyeongyu You, Minjae Jeong, Yujin Pyo
Life of this patent
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Abstract
An integrated circuit includes a plurality of standard cells including first and second standard cells arranged adjacent to each other in a first direction, and first, second, and third metal layers sequentially stacked in a vertical direction. At least one power segment is arranged adjacent a region where at least one of the first standard cell and the second standard cell is arranged. The at least one power segment is configured to provide power to the plurality of standard cells and is formed as a pattern of the third metal layer extending in a second direction.
Claims20
An integrated circuit comprising:
- a plurality of standard cells comprising first and second standard cells arranged adjacent to each other in a first direction;
- and
- first, second, and third metal layers sequentially stacked in a vertical direction, wherein:
- at least one power segment is arranged in a region where at least one of the first standard cell or the second standard cell is arranged,
- the at least one power segment is configured to provide power to the plurality of standard cells and comprises a pattern of the third metal layer extending in a second direction,
- the first metal layer comprises a power line configured to transmit power to the plurality of standard cells, and
- the at least one power segment is shorter in the second direction than the power line.
An integrated circuit comprising:
- a plurality of standard cells comprising first and second standard cells arranged adjacent to each other in a first direction, wherein a cell height of the first standard cell in the first direction is greater than a cell height of the second standard cell in the first direction;
- first, second, and third metal layers sequentially stacked in a vertical direction;
- and
- a power line adjacent a cell boundary of the first standard cell, wherein:
- at least one power segment is arranged in a region where at least one of the first standard cell or the second standard cell is arranged,
- the power line is configured to provide power to the plurality of standard cells and comprises a pattern of the third metal layer extending in the second direction, and
- the power line is longer than the at least one power segment in the second direction.
An integrated circuit comprising:
- a plurality of standard cells comprising first and second standard cells arranged adjacent to each other in a first direction;
- and
- first, second, and third metal layers sequentially stacked in a vertical direction, wherein:
- at least one power segment is configured to provide power to the plurality of standard cells and comprises a pattern of the third metal layer extending in a second direction,
- the at least one power segment comprises a first power segment and a second power segment,
- the first power segment is arranged adjacent to a cell boundary between the first and second standard cells in a first region where the first standard cell is arranged,
- the second power segment is arranged adjacent to the cell boundary in a second region where the second standard cell is arranged, and
- the first and second power segments are electrically connected to different first and second patterns of the second metal layer, respectively.
Dependencies are inferred from the claim text.