Memory controller performing refresh operation and memory system including the same

A memory controller for controlling operations of a memory device, the memory controller comprising:

• a host interface configured to receive a read request including a logical address from a host;
• a metadata manager configured to update a read count of a first memory block including a first page corresponding to the logical address;
• and
• an operation controller in communication with the memory device including a first memory block of pages of memory cells and a second memory block of pages of memory cells and configured to control the memory device to perform a refresh operation of copying data stored in pages of the first memory block to the second memory block based on a read count of the first memory block,
• wherein the operation controller is further configured to perform a test read operation of counting the number of error bits included in data read from the first memory block in response to the read count of the first memory block being greater than a first threshold count, and
• wherein the operation controller is further configured to enter a host read blocking state delaying performance of a read operation corresponding to the read request until data stored in the first page is copied to the second memory block in response to the read count of the first memory block being greater than a second threshold count greater than the first threshold count.

A memory system comprising:

• a memory device including a first memory block and a second memory block;
• and
• a memory controller in communication with a host and the memory device and configured, in response to a read request from the host, to control the memory device to read data stored in a first page corresponding to a logical address included in the read request, update a read count of the first memory block including the first page, and perform a refresh operation of copying data stored in pages of the first memory block to the second memory block based on the read count of the first memory block,
• wherein the memory controller is further configured to enter a host read blocking state delaying performance of a read operation corresponding to the read request based on the read count of the first memory block, the read count increasing after the refresh operation is started.