Access-aware flash translation layer (FTL) capability on flash memory integrated circuit

A method comprising:

• receiving, by flash translation layer (FTL) logic included in a flash memory integrated circuit (IC), from a host device, an encrypted write command comprising a first logical address, user data, and an access token;
• decrypting, by the FTL logic, the encrypted write command to obtain the first logical address, the user data, and the access token;
• retrieving, from access metadata stored in a volatile memory of the flash memory IC, a stored access token that is associated with the first logical address;
• translating the first logical address to a first physical address of an array of flash memory on the flash memory IC, wherein the first physical address has already been programmed;
• verifying the access token as matching the stored access token and thus being associated with the first logical address;
• causing, by the FTL logic, the user data to be programmed to a second physical address of the array in response to determining that the first physical address has already been programmed;
• and
• updating, by the FTL logic, at least one logical-to-physical (L2P) mapping table with the second physical address as being mapped to the first logical address.

A system comprising:

• a host processing device lacking embedded flash memory;
• and
• a flash memory integrated circuit (IC) connected directly to the host processing device, the flash memory IC comprising:
• a memory array;
• a volatile memory;
• and
• flash translation layer (FTL) logic coupled to the memory array and the volatile memory, wherein the FTL logic is configured to:
• receive, from the host processing device, an encrypted write command comprising a first logical address, user data, and an access token;
• decrypt the encrypted write command to obtain the first logical address, the user data, and the access token;
• retrieve, from access metadata stored in the volatile memory, a stored access token that is associated with the first logical address;
• translate the first logical address to a first physical address of the memory array, wherein the first physical address has already been programmed;
• verify the access token as matching the stored access token and thus being associated with the first logical address;
• cause the user data to be programmed to a second physical address of the memory array in response to determining that the first physical address has already been programmed;
• and
• update at least one logical-to-physical (L2P) mapping table with the second physical address as being mapped to the first logical address.