Memory mitigating SCL affects during power-on
AssigneeMicron Technology, Inc.
InventorTingjun Hu
Life of this patent
Estimating the term…
Abstract
This disclosure is directed to a memory system that compensates for slow charge loss (SCL) encountered during a power off period. The memory system computes, during a power-on sequence of the memory device, a first value associated with reading data from an individual portion of the memory device and obtains a second value associated with reading data from the individual portion, the second value having been computed during a power-off sequence of the memory device. The memory system compares the first value with the second value to estimate a measure of SCL encountered while the memory device was powered off and reads the data from a plurality of portions of the memory device based on respective threshold voltages that compensate for the estimated measure of SCL.
Claims20
A system comprising:
- a memory device;
- and
- a processing device, operatively coupled to the memory device, configured to perform operations comprising:
- computing, during a power-on sequence of the memory device, a first value associated with reading data from an individual portion of the memory device;
- obtaining a second value associated with reading data from the individual portion, the second value having been computed during a power-off sequence of the memory device;
- comparing the first value with the second value to estimate a measure of slow charge loss (SCL) encountered while the memory device was powered off;
- and
- reading the data from a plurality of portions of the memory device based on respective threshold voltages that compensate for the estimated measure of SCL, the data read from the plurality of portions of the memory device based on respective threshold voltages that compensate for the estimated measure of SCL until a specified condition is satisfied.
At least one non-transitory machine-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
- computing, during a power-on sequence of a memory device, a first value associated with reading data from an individual portion of the memory device;
- obtaining a second value associated with reading data from the individual portion, the second value having been computed during a power-off sequence of the memory device;
- comparing the first value with the second value to estimate a measure of slow charge loss (SCL) encountered while the memory device was powered off;
- and
- reading the data from a plurality of portions of the memory device based on respective threshold voltages that compensate for the estimated measure of SCL, the data read from the plurality of portions of the memory device based on respective threshold voltages that compensate for the estimated measure of SCL until a specified condition is satisfied.
A method comprising:
- computing, during a power-on sequence of a memory device, a first value associated with reading data from an individual portion of the memory device;
- obtaining a second value associated with reading data from the individual portion, the second value having been computed during a power-off sequence of the memory device;
- comparing the first value with the second value to estimate a measure of slow charge loss (SCL) encountered while the memory device was powered off;
- and
- reading the data from a plurality of portions of the memory device based on respective threshold voltages that compensate for the estimated measure of SCL, the data read from the plurality of portions of the memory device based on respective threshold voltages that compensate for the estimated measure of SCL until a specified condition is satisfied.
Dependencies are inferred from the claim text.