Arrangement of first stage power factor correction circuit and second stage dc/dc converter between package and motherboard of it equipment
AssigneeAA Power Inc.
InventorQun Lu
Life of this patent
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Abstract
A dual-input power supply has two power paths that connect a server in a data center to electrical power. Each power path has a first stage that comprises a power-factor correction circuit. The power paths share a common second stage that comprises a dc/dc converter. The first stages of the power paths collectively define a pair of first stages that is disposed either within a package that is off the motherboard or without a package and on the motherboard. Similarly, the second stage is disposed either within a package that is off the motherboard or without a package and on the motherboard.
Claims20
An apparatus comprising a power supply for providing power to a load comprising a server at a data center, said server comprising a motherboard having load circuitry thereon, said power supply comprising a power path that is connected to electrical power, wherein said power path connects to said load, wherein said power path comprises a first stage that comprises a power-factor correction circuit, wherein said power path further comprises a second stage that comprises a dc/dc converter, wherein said first stage of said power path is disposed either within a package that is off said motherboard or without a package and on said motherboard, and wherein said second stage is disposed either within a package that is off said motherboard or without a package and on said motherboard;
- wherein said first stage comprises capacitors and transformers that collectively sustain a voltage equal to that provided by a source of said electrical power, wherein each of said capacitors sustains a fraction of said voltage, wherein each of said capacitors is connected across a primary winding of a corresponding one of said transformers, wherein said primary windings are cascaded, and wherein secondary windings of said transformers are tied together such that said second stage receives a voltage that is the sum of voltages across each of said capacitors;
- and wherein said first stage is one of a pair of first stages.
Dependencies are inferred from the claim text.