Feedback-based clock frequency adjustment for dynamic clock voltage scaling
AssigneeQUALCOMM Incorporated
InventorsMonobrata Debnath, Anantha Ramaiah Idapalapati, Azzedine Adam Touzni
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Abstract
An apparatus, including: a set of one or more cores; a processor configured to generate a proposed frequency of a clock signal provided to the set of one or more cores in accordance with a dynamic clock voltage scaling (DCVS); a feedback-based clock frequency adjuster configured to generate an adjustment frequency based on feedback information from the set of one or more cores; and a clock generator configured to generate the clock signal with an effective frequency based on the proposed frequency and the adjustment frequency.
Claims29
An apparatus, comprising:
- a set of one or more cores;
- a processor configured to generate a proposed frequency of a clock signal provided to the set of one or more cores in accordance with a dynamic clock voltage scaling (DCVS);
- a feedback-based clock frequency adjuster configured to generate an adjustment frequency based on feedback information from the set of one or more cores;
- and
- a clock generator configured to generate the clock signal with an effective frequency based on the proposed frequency and the adjustment frequency;
- wherein the feedback-based clock frequency adjuster is configured to generate the adjustment frequency based on the feedback information in response to the proposed frequency being less than a defined constant of less than one multiplied by a maximum frequency available for the set of one or more cores, and
- wherein the defined constant defines a confidence level for the proposed frequency of a clock signal relative to the maximum frequency.
A method, comprising:
- generating a proposed frequency for a clock signal;
- generating a frequency adjustment based on feedback information received from a set of one or more cores in response to the proposed frequency being less than a defined constant of less than one multiplied by a maximum frequency available for the set of one or more cores;
- generating a clock signal with an effective frequency based on the proposed frequency and the frequency adjustment;
- and
- providing the clock signal to the set of one or more cores,
- wherein the defined constant defines a confidence level for the proposed frequency of a clock signal relative to the maximum frequency.
An apparatus, comprising:
- means for generating a proposed frequency for a clock signal;
- means for generating a frequency adjustment based on feedback information received from a set of one or more cores in response to the proposed frequency being less than a defined constant of less than one multiplied by a maximum frequency available for the set of one or more cores;
- means for generating a clock signal with an effective frequency based on the proposed frequency and the frequency adjustment;
- and
- means for providing the clock signal to the set of one or more cores,
- wherein the defined constant defines a confidence level for the proposed frequency of a clock signal relative to the maximum frequency.
Dependencies are inferred from the claim text.