Covered cavity for a photonic integrated circuit (PIC)
AssigneeIntel Corporation
InventorsChia-Pin Chiu, Omkar G. Karhade, Kaveh Hosseini, Tim T. Hoang, Nitin A. Deshpande
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AssigneeIntel Corporation
InventorsChia-Pin Chiu, Omkar G. Karhade, Kaveh Hosseini, Tim T. Hoang, Nitin A. Deshpande
Estimating the term…
Covered cavity structure for Photonic integrated circuits (PICs) that include a micro-ring resonator (MRR) with a heater. Air cavities are etched or otherwise thinned into an overlaying oxide layer, a buried oxide layer, or an underlying silicon layer. Variations in size, shape, and location of the covered air cavity associated with an MRR provide customizable options for thermal management. A thin film across an upper surface covers the air cavity, providing a barrier to underfill in the air cavity and preventing interference of underfill with performance of silicon waveguides. When arrayed into a plurality of MRRs, the thin film can cover the plurality of MRRs.
A structure, comprising:
The structure of any one of the preceding claims, wherein the film is an organic film.
A multi-chip package (MCP), comprising:
A device, comprising:
Dependencies are inferred from the claim text.