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US 12,588,568 B2Granted
Semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorTae-Ho Kang
Life of this patent
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Abstract
A semiconductor package includes a plurality of semiconductor chips stacked sequentially. Each semiconductor chip includes a substrate including a back surface and a front surface which are opposite to each other, a plurality of first back conductive pads disposed on the back surface, a plurality of second back conductive pads disposed on the back surface, and a redistribution pattern disposed on the back surface and disposed between the plurality of second back conductive pads.
Claims16
A semiconductor package, comprising:
- a plurality of semiconductor chips stacked sequentially,
- wherein each of the plurality of semiconductor chips comprises:
- a substrate comprising a back surface and a front surface which are opposite to each other;
- a plurality of first back conductive pads disposed on the back surface;
- a plurality of second back conductive pads disposed on the back surface;
- a redistribution pattern disposed on the back surface and disposed between the plurality of second back conductive pads and connects at least two second back conductive pads to each other;
- and
- wherein the plurality of second back conductive pads comprises:
- at least two dummy pads;
- at least two power pads configured to receive a power voltage;
- and
- at least two ground pads configured to receive a ground voltage,
- wherein the redistribution pattern connects the at least two dummy pads to each other,
- the at least two power pads to each other, or the at least two ground pads to each other.
11 more elements
A semiconductor package, comprising:
- a plurality of semiconductor chips stacked sequentially,
- wherein each of the plurality of semiconductor chips comprises:
- a substrate comprising a back surface and a front surface which are opposite to each other;
- a plurality of first back conductive pads disposed on the back surface;
- a plurality of second back conductive pads disposed on the back surface;
- a redistribution pattern disposed on the back surface and connects at least two second back conductive pads of the plurality of second back conductive pads;
- a through-via penetrating the substrate and being in contact with each of the first back conductive pads;
- and
- wherein the plurality of second back conductive pads comprises:
- at least two dummy pads;
- at least two power pads configured to receive a power voltage;
- and
- at least two ground pads configured to receive a ground voltage,
- wherein the redistribution pattern connects the at least two dummy pads to each other,
- the at least two power pads to each other, or the at least two ground pads to each other.
12 more elements
A semiconductor package, comprising:
- a plurality of semiconductor chips stacked sequentially;
- an underfill layer disposed between the plurality of semiconductor chips;
- and
- a mold layer covering the plurality of semiconductor chips,
- wherein each of the plurality of semiconductor chips comprises:
- a substrate comprising a back surface and a front surface which are opposite to each other;
- a plurality of first back conductive pads disposed on the back surface;
- a plurality of second back conductive pads disposed on the back surface;
- a redistribution pattern disposed on the back surface and connects at least two second back conductive pads of the plurality of second back conductive pads;
- a through-via penetrating the substrate and being in contact with each of the first back conductive pads;
- a plurality of interconnection lines disposed on the front surface;
- an interlayer insulating layer covering the interconnection lines;
- a plurality of front conductive pads disposed under the interlayer insulating layer;
- and
- a plurality of internal connection members bonded to the front conductive pads, wherein a width of the redistribution pattern ranges from about 10% to about 300% of a width of at least one of the second back conductive pads, wherein a thickness of the redistribution pattern is about 5 μm or less, and
- wherein the width of the at least one of the second back conductive pads ranges from about 10 μm to about 100 μm;
- and
- wherein the plurality of second back conductive pads comprises:
- at least two dummy pads;
- at least two power pads configured to receive a power voltage;
- and
- at least two ground pads configured to receive a ground voltage,
- wherein the redistribution pattern connects the at least two dummy pads to each other,
- the at least two power pads to each other, or the at least two ground pads to each other.
21 more elements
Dependencies are inferred from the claim text.