Semiconductor package

A semiconductor package comprising:

• a base structure having an upper surface divided into a first region and a second region, the base structure including a base insulating layer on the upper surface, connection pads bordered by the base insulating layer and arranged on the first region, and dummy pads bordered by the base insulating layer, arranged on the second region, each of the dummy pads having an upper surface on which a metal oxide film is disposed;
• at least one semiconductor chip on the first region of the base structure, the at least one semiconductor chip including a semiconductor substrate, a semiconductor device layer on a front surface of the semiconductor substrate, a front-surface insulating layer on the semiconductor device layer and bonded to the base insulating layer in the first region, and front-surface pads bordered by the front-surface insulating layer and respectively bonded to the connection pads;
• and
• a molded layer on the base structure and bordering side surfaces of the at least one semiconductor chip.

A semiconductor package comprising:

• a first semiconductor chip having an upper surface and a lower surface, the upper surface being divided into a first region and a second region bordering the first region;
• a plurality of second semiconductor chips stacked on the first region of the upper surface of the first semiconductor chip, the plurality of second semiconductor chips being a same type of semiconductor chip, which is different from that of the first semiconductor chip;
• and
• a molded layer on the first semiconductor chip and bordering side surfaces of the plurality of second semiconductor chips,
• wherein the first semiconductor chip includes:
• a protective layer on a lower surface of the first semiconductor chip, external connection pads on the protective layer, a first upper insulating layer on an upper surface of the first semiconductor chip, first upper pads on the first region of the upper surface in the first upper insulating layer, dummy pads on the second region of the upper surface in the first upper insulating layer, and metal oxide films respectively on the dummy pads,
• wherein the plurality of second semiconductor chips respectively includes:
• a semiconductor substrate, a semiconductor device layer on a front surface of the semiconductor substrate, a front-surface insulating layer on the semiconductor device layer, front-surface pads in the front-surface insulating layer, a back-surface insulating layer on a back surface of the semiconductor substrate, back-surface pads in the back-surface insulating layer, and a through-electrode extending through the semiconductor substrate and electrically connecting the front-surface pads and the back-surface pads to each other, and
• wherein a front-surface insulating layer of a lowermost second semiconductor chip among the plurality of second semiconductor chips is bonded to the first upper insulating layer, and front-surface pads of the lowermost second semiconductor chip are respectively bonded to the first upper pads.