Multichip packages with 3D integration

A method of fabricating a multi-component electronic device package, the method comprising:

• receiving a first component having a first component thickness;
• bonding the first component to a carrier substrate via electrical contact pads, the first component having a lower surface provided with the electrical contact pads and a secondary surface opposite the lower surface;
• forming a volume of sacrificial material adjacent to the first component;
• encapsulating the first component and the volume of sacrificial material within a volume of molding material;
• releasing the molding material from the carrier substrate;
• forming a first set of redistribution layers from electrically-insulating polymeric material, wherein the first set of redistribution layers is disposed above the lower surface of the first component when the lower surface of the first component is oriented above the secondary surface of the first component;
• forming one or more electrically conductive interconnects that pass through the first set of redistribution layers to the lower surface of the first component;
• forming a cavity that passes through the first set of redistribution layers and into the volume of molding material in a location that is adjacent to the first component by:
• selectively removing the first set of redistribution layers over the volume of sacrificial material, followed by removing the volume of sacrificial material;
• wherein the cavity has a depth that is greater than the first component thickness;
• disposing a second component within the cavity, the second component having a second component thickness that is different from the first component thickness;
• and
• forming one or more additional redistribution layers to fully encapsulate the second component.

A method of fabricating a multi-component electronic device package, the method comprising:

• forming a first redistribution layer including a first set of electrically-conductive interconnects surrounded by a first layer of electrically-insulating polymeric material, wherein the first layer of electrically-insulating polymeric material defines a bottom surface of the electronic device package, and the first set of electrically-conductive interconnects is exposed at the bottom surface;
• forming additional redistribution layers having additional electrically-conductive interconnect layers above the first redistribution layer;
• disposing a first component within the additional redistribution layers;
• disposing a second component above the additional redistribution layers;
• and
• disposing a third component within the additional redistribution layers,
• wherein the additional redistribution layers include one or more conductive paths that electrically connect the second component to the first set of electrically-conductive interconnects within the first redistribution layer,
• wherein the first component has a first thickness spanning a first number of the additional redistribution layers, and
• wherein the second component has a second thickness that is different from the first thickness.