Package bumps of a package substrate having diagonal package bumps

An integrated circuit (IC) package, comprising:

• a package substrate having an upper surface, a lower surface, a first side, and a second side perpendicular to the first side, wherein the package substrate includes a metallization structure;
• an IC die attached to the upper surface of the package substrate;
• first package bumps on the lower surface of the package substrate, the first package bumps electrically coupled to the metallization structure and electrically coupled to a first power node of the IC die;
• and
• second package bumps on the lower surface of the package substrate, the second package bumps electrically coupled to the metallization structure and electrically coupled to a second power node of the IC die,
• wherein the first package bumps are arranged adjacent to one another along a diagonal direction that is diagonal to the package substrate,
• wherein the second package bumps are arranged adjacent to one another along the diagonal direction, and
• wherein the metallization structure comprises:
• sets of third conductive lines extending along a second direction parallel to the second side of the package substrate and electrically coupled with the first package bumps, respectively;
• sets of fourth conductive lines extending along a first direction parallel to the first side of the package substrate and electrically coupled with adjacent conductive lines of the sets of third conductive lines, respectively;
• sets of fifth conductive lines extending along the second direction and electrically coupled with the second package bumps, respectively;
• and
• sets of sixth conductive lines extending along the first direction and electrically coupled with adjacent conductive lines of the sets of fifth conductive lines, respectively.

A method of manufacturing an integrated circuit (IC) package, comprising:

• forming a package substrate having an upper surface, a lower surface, a first side, and a second side perpendicular to the first side, wherein the package substrate includes a metallization structure;
• forming package bumps on the lower surface of the package substrate;
• and
• attaching an IC die to the upper surface of the package substrate
• wherein the package bumps comprising:
• first package bumps electrically coupled to the metallization structure and electrically coupled to a first power node of the IC die;
• and
• second package bumps electrically coupled to the metallization structure and electrically coupled to a second power node of the IC die,
• wherein the first package bumps are arranged adjacent to one another along a diagonal direction that is diagonal to the package substrate,
• wherein the second package bumps are arranged adjacent to one another along the diagonal direction, and
• wherein the forming the package substrate comprises:
• forming sets of third conductive lines in the metallization structure extending along a second direction parallel to the second side of the package substrate and electrically coupled with the first package bumps, respectively;
• forming sets of fourth conductive lines in the metallization structure extending along a first direction parallel to the first side of the package substrate and electrically coupled with adjacent conductive lines of the sets of third conductive lines, respectively;
• forming sets of fifth conductive lines in the metallization structure extending along the second direction and electrically coupled with the second package bumps, respectively;
• and
• forming sets of sixth conductive lines in the metallization structure extending along the first direction and electrically coupled with adjacent conductive lines of the sets of fifth conductive lines, respectively.

An apparatus, comprising:

• an integrated circuit (IC) package comprising:
• a package substrate having an upper surface, a lower surface, a first side, and a second side perpendicular to the first side, wherein the package substrate includes a metallization structure;
• an IC die attached to the upper surface of the package substrate;
• first package bumps on the lower surface of the package substrate, the first package bumps electrically coupled to the metallization structure and electrically coupled to a first power node of the IC die;
• and
• second package bumps on the lower surface of the package substrate, the second package bumps electrically coupled to the metallization structure and electrically coupled to a second power node of the IC die,
• wherein the first package bumps are arranged adjacent to one another along a diagonal direction that is diagonal to the package substrate, and
• wherein the second package bumps are arranged to one another along the diagonal direction,
• wherein the metallization structure comprises:
• first conductive lines extending along the diagonal direction and electrically coupled with the first package bumps;
• and
• second conductive lines extending along the diagonal direction and electrically coupled with the second package bumps.