Methods for assembling stacked substrate packages including dies, laminated base substrates, and dielectric build-up substrates

A method for assembling at least one stacked substrate package comprising:

• a) binding at least one laminated base substrate, configured to route wires between a top surface and a bottom surface-mount package of the at least one laminated base substrate, to a surface of a rigid carrier, wherein the at least one laminated base substrate and the rigid carrier have a coefficient of thermal expansion in a range from 6 ppm/° C. to 12 ppm/° C. to prevent warping during assembly;
• b) coupling at least one integrated circuit die, having a bottom surface mount package, to a top surface of at least one dielectric build-up substrate,
• wherein the at least one dielectric build-up substrate is configured to route wires between the top surface and a bottom surface mount package of the at least one dielectric build-up substrate;
• and
• c) coupling the bottom surface mount package of the at least one dielectric build-up substrate to respective ones of the at least one laminated base substrate;
• and
• d) removing the rigid carrier from the at least one stacked substrate package,
• wherein at least one of:
• a) is performed before b) and c), b) and c) are performed at the same time, and d) is performed after a), b), and c);
• or
• b) is performed before c), c) is performed after a), and d) is performed after a), b), and c).

A method for assembling at least one stacked substrate package comprising, comprising:

• a) coupling at least one laminated base substrate to a rigid carrier to prevent warping of the at least one laminated base substrate,
• wherein the at least one laminated base substrate is configured to route interconnections between first and second surfaces of the at least one laminated base substrate;
• b) coupling at least one integrated circuit to at least one dielectric build-up substrate using a first ball grid array (BGA) to form a substrate stack,
• wherein the at least one dielectric build-up substrate is configured to route integrated interconnections between first and second surfaces of the at least one dielectric build-up substrate;
• c) coupling the second surface of the at least one dielectric build-up substrate to the at least one laminated base substrate using a second BGA;
• and
• d) releasing the rigid carrier from the at least one laminated base substrate,
• wherein at least one of:
• a) is performed before b) and c), b) and c) are performed at the same time, and d) is performed after a), b) and c);
• or
• b) is performed before c), c) is performed after a), and d) is performed after a), b) and c).