Resistive memory device including a silicon oxide base spacer and methods for forming the same

A semiconductor structure comprising:

• an etch-stop dielectric layer overlying a substrate and comprising a two-dimensional array of first opening therethrough;
• a two-dimensional array of silicon oxide plates overlying the etch-stop dielectric layer and comprising a respective second opening therethrough, wherein each of the second openings is laterally offset outward from a respective underlying first opening in the etch-stop dielectric layer;
• and
• a two-dimensional array of memory cells located over the two-dimensional array of silicon oxide plates, wherein:
• each of the memory cells comprises a first conductive structure, a memory film contacting a top surface of the first conductive structure, and a second conductive structure contacting a top surface of the memory film;
• each of the first conductive structures comprises a respective first electrode and extends through a respective second opening and a respective first opening;
• each of the memory films comprises a material that provides at least two resistive states having different electrical resistivity;
• and
• each of the second conductive structures comprises a respective second electrode.

A method of forming a semiconductor structure, comprising:

• forming an etch-stop dielectric layer overlying a substrate;
• forming a silicon oxide layer over the etch-stop dielectric layer;
• forming an opening through the silicon oxide layer and the etch-stop dielectric layer,
• forming a layer stack comprising a first electrode layer, a memory material layer, and a second electrode layer over the opening and over the silicon oxide layer;
• and
• patterning the layer stack and the silicon oxide layer by performing at least one anisotropic etch process, whereby a patterned material stack including a first electrode, a memory film, and a second electrode is formed over a silicon oxide plate, wherein:
• the silicon oxide plate comprises a patterned portion of the silicon oxide layer;
• the first electrode comprises a patterned portion of the first electrode layer;
• the memory film comprises a patterned portion of the memory material layer;
• and
• the second electrode comprises a patterned portion of the second electrode layer.