Thermoelectric element, thermoelectric generator, peltier element, peltier cooler, and methods manufacturing thereof

A thermoelectric element, comprising:

• a dielectric substrate having a hole, wherein the hole has a first opening on a first side of the dielectric substrate and a second opening on a second side of the dielectric substrate;
• a first metallisation pad and a second metallisation pad on the first side, wherein the first opening is between the first metallisation pad and the second metallisation pad;
• a third metallisation pad and a fourth metallisation pad on the second side, wherein the second opening is between the third metallisation pad and the fourth metallisation pad;
• a first semiconductor layer being in direct contact with the first metallisation pad and the second metallisation pad;
• a second semiconductor layer being in direct contact with the third metallisation pad and the fourth metallisation pad, wherein the first semiconductor layer and the second semiconductor layer have different conductivity types, contact with each other via the hole and thereby build a p-n or p-i-n junction.

A method for manufacturing a thermoelectric element, the method comprising:

• at least partially filling a hole of a dielectric substrate with a sacrificial material, wherein the hole has a first opening on a first side of the dielectric substrate and a second opening on a second side of the dielectric substrate, wherein a first metallisation pad and a second metallisation pad are arranged on the first side, wherein the first opening is between the first metallisation pad and the second metallisation pad, wherein a third metallisation pad and a fourth metallisation pad are arranged on the second side, wherein the second opening is between the third metallisation pad and the fourth metallisation pad;
• forming a first semiconductor layer on the sacrificial material and in direct contact with the first metallisation pad and the second metallisation pad;
• removing the sacrificial material;
• and
• forming a second semiconductor layer on the second side of the dielectric substrate, wherein the second semiconductor layer is formed in the hole such that it contacts directly the first semiconductor layer thereby building a p-n or p-i-n junction, wherein the second semiconductor layer is in direct contact with the third metallisation pad and the fourth metallisation pad.