Backside deep trench isolation structure for leakage suppression

A pixel array substrate, comprising:

• a semiconductor substrate including a pixel array, a first side, and a second side opposite the second side, wherein the pixel array includes:
• a plurality of photodiodes;
• and
• a first deep trench isolation (DTI) structure region disposed proximate to the second side of the semiconductor substrate, wherein the first DTI structure region includes a first plurality of DTI structures;
• a guard ring region in the semiconductor substrate enclosing the pixel array, and extending into the semiconductor substrate from the first side;
• and
• a peripheral region in the semiconductor substrate and enclosing the guard ring, wherein the peripheral region includes:
• at least one device;
• and
• a second DTI structure region disposed between the guard ring region and the at least one device and proximate to the second side of the semiconductor substrate,
• wherein the first DTI structure region is configured to isolate each of the plurality of photodiodes in the semiconductor substrate, and
• wherein the second DTI structure region is configured to block an electric current path between P-N junction guard rings in the guard ring region and the at least one device.

An imaging system, comprising:

• a semiconductor substrate including a pixel array, a first side, and a second side opposite the first side;
• a guard ring region in the semiconductor substrate enclosing the pixel array;
• and
• a peripheral region in the semiconductor substrate and enclosing the guard ring region, wherein the peripheral region includes:
• at least one device comprising a doped region;
• and
• a deep trench isolation (DTI) structure disposed between the guard ring region and the at least one device and proximate to the second side of the semiconductor substrate;
• and
• a blanket deep doped well disposed proximate to the second side of the semiconductor substrate extending across the pixel array, the guard ring region, and the peripheral region, wherein the doped region extending from the first side and in contact with the blanket deep doped well,
• wherein the DTI structure is configured to extend through the blanket deep doped well separating the blanket deep doped well into a first sub-doped well portion extending across the peripheral region and a second sub-doped well portion extending across the guard ring region, and to block an electric current path between a P-N junction in the guard ring region and the doped region of the at least one device.