CMOS integration for doped placeholder as direct backside contact
AssigneeInternational Business Machines Corporation
InventorsTsung-Sheng Kang, Tao Li, Ruilong Xie, Nicolas Jean Loubet
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Abstract
A microelectronic structure includes a first nanosheet transistor that includes a first source/drain and a second source/drain. The first source/drain and the second source/drain are doped with a first material. A second nanosheet transistor that includes a third source/drain and fourth source/drain. The third source/drain and the fourth source/drain are doped with a second material. The first material and the second material are different. A placeholder is located on a backside surface of the second source/drain and the placeholder is doped with a third material. The third material is the same as the first material.
Claims20
A microelectronic structure comprising:
- a first nanosheet transistor that includes a first source/drain and a second source/drain, wherein the first source/drain and the second source/drain are doped with a first material;
- a second nanosheet transistor that includes a third source/drain and fourth source/drain, wherein the third source/drain and the fourth source/drain are doped with a second material, wherein the first material and the second material are different;
- and
- a placeholder located on a backside surface of the second source/drain, wherein the placeholder is doped with a third material, wherein the third material is the same as the first material.
A microelectronic structure comprising:
- a first nanosheet transistor that includes a first source/drain and a second source/drain, wherein the first source/drain and the second source/drain are doped with a first material;
- a second nanosheet transistor that includes a third source/drain and fourth source/drain, wherein the third source/drain and the fourth source/drain are doped with a second material, wherein the first material and the second material are different, wherein the third source/drain and the fourth source/drain have different concentrations of the second material;
- and
- a placeholder located on a backside surface of the second source/drain, wherein the placeholder is doped with a third material, wherein the third material is the same as the first material.
A method comprising:
- forming a first nanosheet transistor that includes a first source/drain and a second source/drain, wherein the first source/drain and the second source/drain are doped with a first material;
- forming a second nanosheet transistor that includes a third source/drain and fourth source/drain, wherein the third source/drain and the fourth source/drain are doped with a second material, wherein the first material and the second material are different;
- and
- forming a first placeholder located on a backside surface of the second source/drain and a second placeholder located on the backside surface of the fourth source/drain, wherein the first placeholder and second placeholder are doped with a third material, wherein the third material is the same as the first material.
Dependencies are inferred from the claim text.