Lateral bipolar transistor

A lateral bipolar transistor, comprising:

• an emitter region doped with a first conductivity type, having a first width and a first average doping concentration;
• a collector region doped with the first conductivity type, having a second width greater than the first width of the emitter region and a second average doping concentration lower than the first average doping concentration;
• a base region doped with the second conductivity type and positioned laterally between the emitter region and the collector region;
• wherein said emitter, base, and collector regions are arranged in a silicon layer arranged on an insulator layer, wherein said insulator layer is arranged on a semiconductor substrate;
• a substrate region deprived of the silicon and insulator layers and positioned laterally at a side of the collector region;
• and
• a bias circuit coupled to the substrate region and configured to deliver to said substrate region a bias voltage that modulates an electrostatic doping of the collector region;
• wherein an area of the semiconductor substrate located at least under the substrate region deprived of the silicon layer, the insulator layer, and the collector region, is doped with a gradual doping radially decreasing in a direction away from said substrate region.

A method, comprising:

• providing substrate including a silicon layer on an insulator layer, wherein said insulating layer is on a semiconductor substrate;
• forming, in the silicon layer, an emitter region having a first width, doped with a first conductivity type, and a first average doping concentration;
• forming, in the silicon layer, a collector region having a second width greater than the first width, doped with the first conductivity type, and a second average doping concentration lower than the first average doping concentration;
• forming, in the silicon layer, a base region doped with the second conductivity type and positioned laterally between said emitter region and said collector region;
• forming a substrate region deprived of the silicon and insulator layers, said substrate region being positioned laterally at a side of the collector region;
• forming a doped region in said semiconductor substrate extending from said substrate region under the insulating layer below the collector region but not extending below the emitter region;
• and
• forming a bias circuit coupled to the doped region at the substrate region and configured to deliver to said doped region a bias voltage that modulates an electrostatic doping of the collector region.