Field effect transistor with dual silicide and method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShih-Chuan Chiu, Lo-Heng Chang, Huan-Chieh Su, Cheng-Chi Chuang, Yun Ju Fan, Chih-Hao Wang
Life of this patent
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Abstract
A device includes a substrate, a gate structure, a source/drain region, a first silicide layer, a second silicide layer and a contact. The gate structure wraps around at least one vertical stack of nanostructure channels. The source/drain region abuts the gate structure. The first silicide layer includes a first metal component on the source/drain region. The second silicide layer includes a second metal component different than the first metal component, and is on the first silicide layer. The contact is on the second silicide layer.
Claims20
A device, comprising:
- a substrate;
- a gate structure wrapping around at least one vertical stack of nanostructure channels;
- a source/drain region abutting the at least one vertical stack of nanostructure channels;
- a first silicide layer including a first metal component directly physically contacting the source/drain region;
- a second silicide layer including a second metal component different than the first metal component, the second silicide layer directly physically contacting the first silicide layer;
- a contact directly physically contacting the second silicide layer;
- a second source/drain region abutting the gate structure;
- a third silicide layer directly physically contacting the second source/drain region, the third silicide layer has the same material as the second silicide layer;
- and
- a second contact contacting the third silicide layer.
A device comprising:
- a substrate;
- a vertical stack of nanostructures over the substrate;
- an N-type source/drain region abutting first ends of the nanostructures;
- a P-type source/drain region abutting second ends of the nanostructures;
- a P-type silicide layer directly physically contacting the P-type source/drain region;
- an N-type silicide layer directly physically contacting the N-type source/drain region and directly physically contacting the P-type silicide layer on the P-type source/drain region;
- and
- contacts directly physically contacting the N-type silicide layer.
A device, comprising:
- a substrate;
- a source/drain region abutting at least one vertical stack of nanostructure channels;
- a first silicide layer including a first metal component directly physically contacting the source/drain region;
- a second silicide layer including a second metal component different than the first metal component, the second silicide layer directly physically contacting the first silicide layer;
- a second source/drain region abutting the at least one vertical stack of nanostructure channels;
- and
- a third silicide layer directly physically contacting the second source/drain region, the third silicide layer has the same material as the second silicide layer.
Dependencies are inferred from the claim text.