Semiconductor devices with implanted STI regions and methods of forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsI-Ming Chang, Yao-Sheng Huang, Hsiang-Pi Chang, Yi-Ruei Jhan, Huang-Lin Chao
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Abstract
A method for fabricating semiconductor devices includes forming a stack structure protruding from a substrate and including a plurality of first semiconductor layers and a plurality of second semiconductor layers stacked on top of one another. The method includes forming an isolation structure overlaying the substrate and a lower portion of the stack structure. The method includes implanting dopants into at least an upper portion of the isolation structure.
Claims20
A method for fabricating semiconductor devices, comprising:
- forming a stack structure protruding from a substrate and including a plurality of first semiconductor layers and a plurality of second semiconductor layers stacked on top of one another;
- forming an isolation structure overlaying the substrate and a lower portion of the stack structure;
- and
- prior to any step of potentially damaging the isolation structure, implanting dopants into at least an upper portion of the isolation structure.
A method for fabricating semiconductor devices, comprising:
- forming a channel structure protruding from a substrate;
- forming an isolation structure comprising oxide, and overlaying the substrate and a lower portion of the channel structure;
- and
- prior to any step of potentially damaging the isolation structure, doping at least an upper portion of the isolation structure with dopants including at least one of carbon atoms or silicon atoms.
A semiconductor device, comprising:
- a plurality of nanostructures disposed above a substrate, vertically spaced from one another, and each extending along a first lateral direction;
- an isolation structure disposed below the plurality of nanostructures, overlaying the substrate, and having at least an upper portion of the isolation structure doped with one or more dopants such that a dielectric property of the upper portion is different from a dielectric property of a bottom portion of the isolation structure;
- a metal gate structure extending along a second lateral direction and wrapping around each of the plurality of nanostructures;
- and
- a pair of source/drain structures disposed on opposite sides of the metal gate structure along the first lateral direction.
Dependencies are inferred from the claim text.