Silicon layer-based silicide contacts
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYi-He Tsai, Yi-Hung Chang, Lung Chen, Long-Jie Hong
Life of this patent
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Abstract
A semiconductor device includes a semiconductor channel. The semiconductor device includes a metal gate structure disposed over the semiconductor channel. The semiconductor device includes a gate electrode having a bottom surface contacting an upper surface of the metal gate structure. The gate electrode has its side portions extending from its top surface toward the semiconductor fin with a first depth and a central portion extending from its top surface toward the semiconductor fin with a second depth, the first depth being substantially greater than the second depth.
Claims19
A method for fabricating a semiconductor device, comprising:
- epitaxially growing a source/drain region within a first recess, wherein the source/drain region comprises one or more semiconductor layers;
- forming a second recess defining a concave upper surface of the source/drain region and having sidewalls extending above the source/drain region;
- forming a silicon layer over the concave upper surface of the source/drain region and the sidewalls of the second recess;
- forming a titanium layer over the silicon layer, over the concave upper surface and the sidewalls of the second recess;
- filling a remaining portion of the second recess with a conductive material;
- and
- annealing at least the silicon layer and the titanium layer to form a titanium-silicide layer over the source/drain region.
A method for fabricating a semiconductor device, comprising:
- forming a plurality of dummy gates over respective first portions of a fin structure formed over a semiconductor substrate;
- forming a plurality of spacers, each of the spacers extending along opposite sidewalls of a corresponding one of the dummy gates;
- removing second portions of the fin structure that are not overlaid by the dummy gates or their respective spacers to form a plurality of recesses;
- epitaxially growing a plurality of source/drain regions in the recesses, respectively;
- forming a silicon layer, at least in the recesses, over respective top surfaces of the source/drain regions;
- forming a titanium layer, at least in the recesses, over the silicon layer;
- filling a remaining portion of each of the recesses with a conductive material;
- annealing at least the silicon layer and the titanium layer to form a titanium-silicide layer over each of the source/drain regions, wherein the titanium-silicide layer interfaces, along a vertical dimension, with at least one spacer of the plurality of spacers;
- and
- forming a plurality of metal gates by replacing the dummy gates, respectively.
A method for fabricating a semiconductor device, comprising:
- forming a plurality of first gates over respective first portions of a fin structure formed over a semiconductor substrate;
- forming a plurality of spacers, each of the spacers extending along opposite sidewalls of a corresponding one of the first gates;
- removing second portions of the fin structure that are not overlaid by the first gates or their respective spacers to form a plurality of first recesses;
- forming source/drain regions in the first recesses;
- forming a dielectric layer over the source/drain regions;
- forming a second recess through the dielectric layer to expose a concave upper surface of the source/drain region;
- and
- forming a silicide layer over the concave upper surface of the source/drain regions.
Dependencies are inferred from the claim text.