FinFET MOS capacitor
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsSung-Hsin Yang, Jung-Chi Jeng, Ru-Shang Hsiao
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Abstract
Various embodiments of the present disclosure are directed towards a FinFET MOS capacitor. In some embodiments, the FinFET MOS capacitor comprises a substrate and a capacitor fin structure extending upwardly from an upper surface of the substrate. The capacitor fin structure comprises a pair of dummy source/drain regions separated by a dummy channel region and a capacitor gate structure straddling on the capacitor fin structure. The capacitor gate structure is separated from the capacitor fin structure by a capacitor gate dielectric.
Claims20
A semiconductor device integrated in front-end-of-line (FEOL), comprising:
- a substrate;
- a capacitor fin structure extending upwardly from an upper surface of the substrate, the capacitor fin structure comprising a pair of dummy source/drain regions separated by a dummy channel region, wherein the dummy channel region comprises a series of doping regions and separating semiconductor regions therebetween, wherein the series of doping regions is vertically stacked in a direction perpendicular to the upper surface of the substrate and has doping concentrations greater than those of the separating semiconductor regions;
- and
- a capacitor gate structure straddling the capacitor fin structure, the capacitor gate structure being separated from the capacitor fin structure by a capacitor gate dielectric.
A semiconductor device, comprising:
- a substrate;
- a capacitor fin structure extending upwardly from an upper surface of the substrate, the capacitor fin structure comprising a pair of dummy source/drain regions separated by a dummy channel region, wherein the dummy channel region has a greater doping concentration than the pair of dummy source/drain regions, and wherein the capacitor fin structure has a first width smaller than a first width of a transistor fin structure along a lateral direction at a first lateral plane and has a second width the same as a second width of the transistor fin structure along the lateral direction at a second lateral plane lower than the first lateral plane;
- and
- a capacitor gate structure straddling the capacitor fin structure, the capacitor gate structure being separated from the capacitor fin structure by a capacitor gate dielectric.
A semiconductor device, comprising:
- a substrate;
- a capacitor fin structure extending upwardly from an upper surface of the substrate, the capacitor fin structure comprising a pair of dummy source/drain regions separated by a dummy channel region;
- a capacitor gate structure straddling on the capacitor fin structure, the capacitor gate structure being separated from the capacitor fin structure by a capacitor gate dielectric;
- and
- a transistor fin structure arranged in a lateral direction with the capacitor fin structure along the upper surface of the substrate, the transistor fin structure being separated from a transistor gate structure by a transistor gate dielectric,
- wherein the capacitor gate dielectric has a greater thickness than the transistor gate dielectric, and
- wherein the capacitor fin structure has a first width smaller than a first width of the transistor fin structure along the lateral direction at a first lateral plane.
Dependencies are inferred from the claim text.