Semiconductor device including stack structure and trenches
AssigneeSamsung Electronics Co., Ltd.
InventorsSeung Hyun Cho, Kwang Ho Lee, Ji Hwan Yu, Jong Soo Kim
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Abstract
A semiconductor device includes a plurality of blocks on a substrate. Trenches are disposed between the plurality of blocks. Conductive patterns are formed inside the trenches. A lower end of an outermost trench among the trenches is formed at a level higher than a level of a lower end of the trench adjacent to the outermost trench. Each of the blocks includes insulating layers and gate electrodes, which are alternately and repeatedly stacked. Pillars pass through the insulating layers and the gate electrodes along a direction orthogonal to an upper surface of the substrate.
Claims20
A semiconductor device comprising:
- a silicon substrate;
- blocks on the silicon substrate, wherein the blocks include a main block and a dummy block;
- and
- trenches respectively disposed between adjacent ones of the blocks,
- wherein the trenches include a main trench adjacent to the main block and a dummy trench adjacent to the dummy block,
- wherein the main block includes:
- a main stack including first insulating layers and first horizontal layers alternately stacked in a vertical direction;
- and
- main pillars penetrating through the main stack,
- wherein the dummy block includes:
- a dummy stack including second insulating layers and second horizontal layers alternately stacked in the vertical direction;
- and
- dummy pillars penetrating through the dummy stack and including a first dummy pillar and a second dummy pillar,
- wherein each of both the main and dummy pillars includes:
- a semiconductor pattern;
- a core pattern on the semiconductor pattern;
- and
- a channel structure on a side surface of the core pattern and in contact with the semiconductor pattern,
- wherein the semiconductor pattern of each of the main pillars penetrates through a lowermost first horizontal layer of the first horizontal layers,
- wherein the semiconductor pattern of each of the dummy pillars penetrates through a lowermost second horizontal layer of the second horizontal layers,
- wherein the first horizontal layers are at substantially the same level as the second horizontal layers,
- wherein the first insulating layers are at substantially the same level as the second insulating layers,
- wherein a lower end of the main trench is at a lower level than a lower end of the dummy trench, and
- wherein each of the trenches has a line shape extending in a first direction parallel to an upper surface of the silicon substrate.
A semiconductor device comprising:
- a silicon substrate;
- blocks on the silicon substrate, wherein the blocks include a main block and a dummy block;
- and
- trenches respectively disposed between adjacent ones of the blocks,
- wherein the trenches include a main trench adjacent to the main block and a dummy trench adjacent to the dummy block;
- wherein the main block includes:
- a main stack including first insulating layers and first horizontal layers alternately stacked in a vertical direction;
- main pillars penetrating through the main stack;
- and
- bit line plugs on and in contact with upper surfaces of the main pillars,
- wherein the dummy block includes:
- a dummy stack including second insulating layers and second horizontal layers alternately stacked in the vertical direction;
- dummy pillars penetrating through the dummy stack and including a first dummy pillar and a second dummy pillar;
- and
- an upper insulating layer on and in contact with entire upper surfaces of the dummy pillars,
- wherein each of both the main and dummy pillars includes:
- a semiconductor pattern;
- a core pattern on the semiconductor pattern;
- and
- a channel structure on a side surface of the core pattern and in contact with the semiconductor pattern,
- wherein the semiconductor pattern of each of the main pillars penetrates through a lowermost first horizontal layer of the first horizontal layers,
- wherein the semiconductor pattern of each of the dummy pillars penetrates through a lowermost second horizontal layer of the second horizontal layers,
- wherein the first horizontal layers are at substantially the same level as the second horizontal layers,
- wherein the first insulating layers are at substantially the same level as the second insulating layers,
- wherein a distance between the first dummy pillar and the main block is greater than a distance between the second dummy pillar and the main block,
- wherein a side surface of each of the semiconductor patterns of the main pillars has a recessed portion facing the lowermost first horizontal layer,
- wherein a side surface of the semiconductor pattern of the first dummy pillar does not have a recessed portion facing the lowermost second horizontal layer, and
- wherein a side surface of the semiconductor pattern of the second dummy pillar has a recessed portion facing the lowermost second horizontal layer.
A semiconductor device comprising:
- blocks on a substrate;
- trenches respectively disposed between adjacent ones of the blocks;
- and
- each of the trenches includes a conductive pattern formed inside the trench,
- wherein a lowermost end of an outermost trench among the trenches is formed at a level higher than a level of a lowermost end of a trench immediately adjacent to the outermost trench,
- each of the blocks includes insulating layers and conductive layers, which are alternately and repeatedly stacked, and pillars passing through the insulating layers and the conductive layers along a direction orthogonal to an upper surface of the substrate, and
- each of the trenches has a line shape extending in a first direction parallel to the upper surface of the substrate.
Dependencies are inferred from the claim text.