Method of manufacturing semiconductor device including silicon channel having increased mobility

A method of manufacturing a semiconductor device, the method comprising:

• forming a stacked structure in which a plurality of interlayer insulating layers and a plurality of sacrificial layers are alternately stacked on a substrate;
• etching the stacked structure to form an opening passing through the stacked structure;
• forming, in the opening, a first amorphous channel layer including impurities on a side surface of the opening, wherein the first amorphous channel layer contacts a part of the substrate;
• and
• forming, in the opening, a second amorphous channel layer in contact with the first amorphous channel layer and on the first amorphous channel layer,
• wherein a first temperature at which the first amorphous channel layer is formed is lower than a second temperature at which the second amorphous channel layer is formed.

A method of manufacturing a semiconductor device, the method comprising:

• forming a stacked structure in which a plurality of interlayer insulating layers and a plurality of sacrificial layers are alternately stacked on a substrate;
• etching the stacked structure to form an opening exposing a part of the substrate through the stacked structure;
• forming a gate insulating layer on a side surface of the opening;
• forming, in the opening, a first amorphous silicon layer at a first temperature on both the part of the substrate and the gate insulating layer by supplying a silicon source gas and an impurity source gas together, wherein the first amorphous silicon layer contacts the part of the substrate;
• forming, in the opening, a second amorphous silicon layer in contact with the first amorphous silicon layer and on the first amorphous silicon layer at a second temperature higher than the first temperature by supplying the silicon source gas and not supplying the impurity source gas;
• and
• forming a polycrystalline silicon layer by crystallizing the first amorphous silicon layer and the second amorphous silicon layer, wherein the first amorphous silicon layer comprises impurities, and the impurities comprises at least one selected from the group consisting of O, C, and N.