Transistor, semiconductor structure, memory, and method for forming same

A method for forming a semiconductor structure, comprising:

• providing a substrate, the substrate comprising a first substrate sub-part, a second substrate sub-part, and a third substrate sub-part sequentially connected in a first direction, and a sixth substrate sub-part connected to the first substrate sub-part or the third substrate sub-part;
• the second substrate sub-part sequentially having a first end face and a second end face which are arranged opposite to each other in the first direction;
• the first substrate sub-part extending from the first end face in a second direction, the first substrate sub-part sequentially having a third end face and a fourth end face which are arranged opposite to each other in the first direction, the fourth end face being connected to the first end face, the third substrate sub-part extending from the second end face in a direction opposite to the second direction, the third substrate sub-part sequentially having a fifth end face and sixth end face which are arranged opposite to each other in the first direction, the fifth end face being connected to the second end face, and the second direction intersecting the first direction;
• respectively doping the first substrate sub-part, the second substrate sub-part, the third substrate sub-part, and the sixth substrate sub-part with ions, so as to form a source structure a trench, a drain structure, and a storage contract structure;
• forming a gate structure surrounding the trench and connected to the fourth end face and the fifth end face by depositing;
• and
• sequentially depositing a first electrode layer, a dielectric layer, and a second electrode layer on a surface of the storage contact structure, so as to form the storage structure.

A method for forming a memory, comprising:

• providing a plurality of columns of substrates arranged in a first direction or a second direction, each column of the substrates comprising the substrates arranged in a third direction;
• the first direction, the second direction, and the third direction intersecting each other;
• a substrate comprising a first substrate sub-part, a second substrate sub-part, and a third substrate sub-part sequentially connected in the first direction, and a sixth substrate sub-part connected to the first substrate sub-part or the third substrate sub-part, the second substrate sub-part sequentially having a first end face and a second end face which are arranged opposite to each other in the first direction, the first substrate sub-part extending from the first end face in the second direction, the first substrate sub-part sequentially having a third end face and a fourth end face which are arranged opposite to each other in the first direction, the fourth end face being connected to the first end face, the third substrate sub-part extending from the second end face in a direction opposite to the second direction, the third substrate sub-part sequentially having a fifth end face and a sixth end face which are arranged opposite to each other in the first direction, the fifth end face being connected to the second end face;
• doping the first substrate sub-part, the second substrate sub-part, the third substrate sub-part, and the sixth substrate sub-part of the substrate with ions, so as to form a source structure, a trench, a drain structure, and a storage contract structure respectively corresponding to the first substrate sub-part, the second substrate sub-part, the third substrate sub-part, and the sixth substrate sub-part;
• forming gate structures on the doped substrate by depositing and forming word lines, each of which is connected to the gate structures of a column of the substrates, a gate structure surrounding the trench in the substrate and being connected to the fourth end face and the fifth end face in the substrate;
• sequentially depositing a first electrode layer, a dielectric layer, and a second electrode layer on a surface of the storage contact structure, so as to form a storage structure;
• and
• forming a plurality of bit lines, each of the bit lines being connected to either source structures or drain structures, not connected to storage structures, of a row of the substrates arranged in the first direction or the second direction.