Hardware efficient decoder side motion vector refinement

A hardware arrangement for decoder side motion vector refinement, comprising:

• a first hardware component comprising a buffer configured to store pixel values of pixels of a first prediction block from a first reference frame that is identified by a first initial motion vector (MV) and pixels defined by a first search area of the first prediction block, and configured to store a second prediction block from a second reference frame that is identified by a second initial MV vector and pixels defined by a second search area for the second prediction block, wherein the first initial MV vector and the second initial MV were used for inter prediction of a current block of image data;
• a number of second hardware components configured to, for multiple pixel locations of the first search area and the second search area defined by respective offset motion vectors (MVs), determine a respective difference value between the first prediction block and the second prediction block shifted by the respective offset MVs;
• a third hardware component configured to determine a minimum of the respective difference values, a location of the minimum associated with an offset MV of the respective offset MVs;
• and
• a fourth hardware component configured to output at least one refined value for reconstruction of a sub-block of the current block determined using the offset MV, wherein the at least one refined value comprises at least one of a first refined MV determined by modifying the first initial MV using the offset MV, a second refined MV determined by modifying the second initial MV using the offset MV, a refined first prediction block centered at a position within the first reference frame identified by the first refined motion vector, or a refined second prediction block centered at a position within the second reference frame identified by the second refined motion vector.