Handling resets

A non-transitory computer-readable medium to store computer-readable code for fabrication of an apparatus comprising:

• bridge circuitry operable to communicate transport packets between a transport network and data processing circuitry, at least a portion of the data processing circuitry operating in a given reset domain other than a reset domain of the transport network;
• packet tracking circuitry to monitor the transport packets received at the bridge circuitry and, for transport packets that require a response by the data processing circuitry, to track whether the response has been provided;
• and
• reset handling circuitry responsive to a reset request for the given reset domain to:
• cause the bridge circuitry to reject new transport packets received for the given reset domain;
• and
• when the packet tracking circuitry indicates that a response has been provided for transport packets associated with the given reset domain that require a response, accept the reset request for the given reset domain and allow the data processing circuitry to carry out a reset for the at least a portion of the data processing circuitry operating in the given reset domain.

A method of handling resets, the method comprising:

• communicating transport packets between a transport network and data processing circuitry, at least a portion of the data processing circuitry operating in a given reset domain other than a reset domain of the transport network;
• monitoring the transport packets received and, for transport packets that require a response by the data processing circuitry, tracking whether the response has been provided;
• responsive to a reset request for the given reset domain:
• causing the bridge circuitry to reject new transport packets received for the given reset domain;
• and
• further in response to the tracking indicate that a response has been provided for transport packets associated with the given reset domain that require a response, accepting the reset request for the given reset domain and allowing the data processing circuitry to carry out a reset for the at least a portion of the data processing circuitry operating in the given reset domain.