Method and system of error injection for low-density parity-check

A system for verifying a low-density parity-check (LDPC) soft decode capability, the system comprising:

• a memory system including a memory device and a memory controller in which an LDPC unit to be verified is provided;
• and
• a host coupled to the memory system,
• the system configured to:
• receive original data corresponding to the memory device in which each memory cell is configured to store n-bit of data, wherein n is a whole number larger than 1;
• encode the original data by use of the LDPC unit;
• map the encoded original data with a data pattern indicating threshold voltage distributions of corresponding logic states to generate threshold voltage data for the encoded original data;
• generate soft data based on the threshold voltage data for the encoded original data and preset threshold voltage offsets;
• and
• verify a soft decode capability of the LDPC unit by utilizing the soft data.

A memory system comprising:

• a memory controller in which an LDPC unit to be verified is provided;
• and
• a memory device with a memory cache coupled to the memory controller,
• the memory system configured to:
• receive original data corresponding to the memory device in which each memory cell is configured to store n-bit of data, wherein n is a whole number larger than 1;
• encode the original data by use of the LDPC unit;
• map the encoded original data with a data pattern indicating threshold voltage distributions of corresponding logic states to generate threshold voltage data for the encoded original data;
• generate soft data based on the threshold voltage data for the encoded original data and preset threshold voltage offsets;
• and
• verify a soft decode capability of the LDPC unit by utilizing the soft data.